Hi Pavan,
thank you for your answer.
I get this output:

larcher@na75:> HYDRA_TOPO_DEBUG=1  mpiexec -n 8 -bind-to hwthread -map-by core /bin/true | sort
process 0 binding: 1 0 0 0 0 0 0 0
process 1 binding: 0 1 0 0 0 0 0 0
process 2 binding: 0 0 1 0 0 0 0 0
process 3 binding: 0 0 0 1 0 0 0 0
process 4 binding: 0 0 0 0 1 0 0 0
process 5 binding: 0 0 0 0 0 1 0 0
process 6 binding: 0 0 0 0 0 0 1 0
process 7 binding: 0 0 0 0 0 0 0 1

larcher@na75:> HYDRA_TOPO_DEBUG=1  mpiexec -n 4 -bind-to hwthread -map-by core /bin/true | sort
process 0 binding: 1 0 0 0 0 0 0 0
process 1 binding: 0 1 0 0 0 0 0 0
process 2 binding: 0 0 1 0 0 0 0 0
process 3 binding: 0 0 0 1 0 0 0 0

which is exactly what I need, thank you !
Also passing -bind-to core:1 is suitable.
Best,

Aurelien


On Wed, Apr 1, 2015 at 7:28 PM, Balaji, Pavan <balaji@anl.gov> wrote:

Try this:

HYDRA_TOPO_DEBUG=1  mpiexec -n 8 -bind-to hwthread -map-by core /bin/true | sort

  -- Pavan

> On Apr 1, 2015, at 12:26 PM, Balaji, Pavan <balaji@anl.gov> wrote:
>
>
> This is not linux specific.  It's following whatever order the OS gives it.  You might want to look at the -map-by option for better controlling the processes in the way you are looking for.
>
>  -- Pavan
>
>> On Apr 1, 2015, at 11:47 AM, Aurélien Larcher <aurelien.larcher@gmail.com> wrote:
>>
>> Hi Rajeev,
>> thank you for the pointer, actually this page leads me to another question.
>> What is exactly the policy for binding by hwthreads ?
>>
>> I can see that:
>>
>> larcher@na75:> HYDRA_TOPO_DEBUG=1  mpiexec -n 8 -bind-to hwthread /bin/true | sort
>> process 0 binding: 1 0 0 0 0 0 0 0
>> process 1 binding: 0 0 0 0 1 0 0 0
>> process 2 binding: 0 1 0 0 0 0 0 0
>> process 3 binding: 0 0 0 0 0 1 0 0
>> process 4 binding: 0 0 1 0 0 0 0 0
>> process 5 binding: 0 0 0 0 0 0 1 0
>> process 6 binding: 0 0 0 1 0 0 0 0
>> process 7 binding: 0 0 0 0 0 0 0 1
>>
>> Which seems unfortunate because since the processor is a quad core with hyperthreading the same physical core will get the first two threads.
>>
>> larcher@na75:> psrinfo -pv
>> The physical processor has 4 cores and 8 virtual processors (0-7)
>>  The core has 2 virtual processors (0 4)
>>  The core has 2 virtual processors (1 5)
>>  The core has 2 virtual processors (2 6)
>>  The core has 2 virtual processors (3 7)
>>    x86 (GenuineIntel 206A7 family 6 model 42 step 7 clock 3392 MHz)
>>      Intel(r) Core(tm) i7-2600 CPU @ 3.40GHz
>>
>>
>> This is confirmed by:
>>
>> HYDRA_TOPO_DEBUG=1  mpiexec -n 4 -bind-to hwthread /bin/true | sort
>> process 0 binding: 1 0 0 0 0 0 0 0
>> process 1 binding: 0 0 0 0 1 0 0 0
>> process 2 binding: 0 1 0 0 0 0 0 0
>> process 3 binding: 0 0 0 0 0 1 0 0
>>
>> Is it due to a Linux-specific numbering of logical cores ?
>>
>> Thank you,
>>
>> Aurelien
>>
>>
>>
>>
>> On Wed, Apr 1, 2015 at 6:18 PM, Thakur, Rajeev <thakur@mcs.anl.gov> wrote:
>> Yes, see https://wiki.mpich.org/mpich/index.php/Using_the_Hydra_Process_Manager#Process-core_Binding
>>
>> Rajeev
>>
>>
>> On Apr 1, 2015, at 11:14 AM, Aurélien Larcher <aurelien.larcher@gmail.com>
>> wrote:
>>
>>> Hi,
>>> running parallel code on my workstation (with OpenIndiana) I discovered that MPI processes were migrated on a regular basis from one core to another.
>>>
>>> On SunOS systems the command 'pbind' allows binding a process to a specific core.
>>> So I am wondering if binding automatically each process to the next available core is supported directly from MPICH ?
>>>
>>> Best regards
>>>
>>> Aurelien
>>>
>>> --
>>> -------------------------------------------------------------------------------
>>> LARCHER Aurélien          | KTH, School of Computer Science and Communication
>>> Work: +46 (0) 8 790 71 42 | Lindstedtsvägen 5, Plan 4, 100 44 Stockholm, SWEDEN
>>> -------------------------------------------------------------------------------
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>>
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>>
>>
>> --
>> -------------------------------------------------------------------------------
>> LARCHER Aurélien          | KTH, School of Computer Science and Communication
>> Work: +46 (0) 8 790 71 42 | Lindstedtsvägen 5, Plan 4, 100 44 Stockholm, SWEDEN
>> -------------------------------------------------------------------------------
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>
> --
> Pavan Balaji  ✉️
> http://www.mcs.anl.gov/~balaji
>
> _______________________________________________
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--
Pavan Balaji  ✉️
http://www.mcs.anl.gov/~balaji

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LARCHER Aurélien          | KTH, School of Computer Science and Communication
Work: +46 (0) 8 790 71 42 | Lindstedtsvägen 5, Plan 4, 100 44 Stockholm, SWEDEN
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