=============================================================================== PMBS 2026 :: 2nd Call for Papers 17th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS26) held in conjunction with IEEE/ACM SC26, Chicago, IL, USA, November 15, 2026 https://urldefense.us/v3/__https://pmbs-workshop.github.io__;!!G_uCfscf7eWS!... =============================================================================== The PMBS26 workshop is concerned with the comparison of high-performance computer systems through performance modeling, benchmarking or through the use of tools such as simulators. We are particularly interested in research which reports the ability to measure and make trade-offs in software/hardware co-design to improve sustained application performance. We are also keen to capture the assessment of future systems, for example through work that ensures continued application scalability through peta- and exa-scale systems. The aim of this workshop is to bring together researchers, from industry and academia, concerned with the qualitative and quantitative evaluation and modeling of high-performance computing systems. Authors are invited to submit novel research in all areas of performance modeling, benchmarking and simulation, and we welcome research that brings together current theory and practice. We recognize that the coverage of the term performance has broadened to include power consumption and reliability, and that performance modeling is practiced through analytical methods and approaches based on software tools and simulators. We encourage submissions in the following areas: * Performance modeling, analysis, and prediction of applications and high-performance computing systems * Novel techniques and tools for performance evaluation and prediction * Advanced simulation techniques and tools * Micro-benchmarking, application benchmarking and tracing * Performance-driven code optimization and scalability analysis * Verification and validation of performance models * Benchmarking and performance analysis of novel hardware * Performance concerns in software/hardware co-design * Tuning and auto-tuning of HPC applications and algorithms * Benchmark suites * Performance visualization * Real-world case studies * Studies of heterogeneous architectures and many-core accelerators Work which examines similar topics will also be considered. === Best Student Paper === Upon submission, authors may indicate that their paper is eligible for the Best Student Paper. To be eligible, the first author must be a student at the time of submission. The first-place student paper will receive a complimentary SC26 workshop registration. === Important Dates === August 9 2026 (23:59 AoE) extended firm deadline - Full Paper Submissions August 26 2026 (23:59 AoE) - Late Breaking and Short Paper Submissions September 4 2026 - Full Paper Notifications September 9 2026 - Late Breaking and Short Paper Notifications September 25 2026 - Camera Ready Papers Due November 15 2026 - PMBS26 Workshop === Workshop Organizers === * Sascha Hunold, TU Wien, Austria * Steven A. Wright, University of York, UK * Simon Hammond, National Nuclear Security Administration, USA === Programme Committee (tentative) === * Mauricio Araya-Polo, TotalEnergies, USA * Dominic Brown, NVIDIA Corporation, UK * Pedro Bruel, HPE, USA * Fabien Chaix, FORTH-ICS, Greece * Xinye Chen, Sorbonne University, LIP6, CNRS, France * Camille Coti, École de Technologie Supérieure, Canada * Daniele De Sensi, Sapienza University of Rome, Italy * Ryusuke Egawa, Tokyo Denki University, Tohoku University, Japan * Danielle A. Ellsworth, Colorado College, USA * Jiří Filipovič, Masaryk University, Czech Republic * Paddy Gillies, European Centre for Medium-Range Weather Forecasts, UK * Ruben Gran Tejero, University of Zaragoza, Spain * Jeff R. Hammond, NVIDIA Corporation, Finland * Andreas Herten, Jülich Supercomputing Centre (JSC), Germany * Nikhil Jain, NVIDIA Corporation, USA * Ana Jokanović, Hokus Platform, Spain * Michael Klemm, Advanced Micro Devices, Inc. (AMD); OpenMP Architecture Review Board, Germany * Ruben Laso, University of Vienna, Austria * Kewen Meng, Advanced Micro Devices, Inc. (AMD), USA * Gihan Mudalige, University of Warwick, UK * Naohito Nakasato, University of Aizu, Japan * Daniel Nichols, Lawrence Livermore National Laboratory, USA * Miquel Pericas, Chalmers University of Technology, Sweden * Dirk Pleiter, University of Groningen, KTH Royal Institute of Technology, Netherlands * Jonas Posner, Fulda University of Applied Sciences, Germany * Amir Raoofy, Leibniz Supercomputing Centre (LRZ), Technical University of Munich, Germany * Ari Rasch, University of Münster, Germany * Istvan Z. Reguly, Pázmány Péter Catholic University, Hungary * Andrey Semin, Apple Inc., Germany * S.-Kazem Shekofteh, Heidelberg University, Germany * Philippe Swartvagher, INRIA Bordeaux, France * Luan Teylo, French Institute for Research in Computer Science and Automation (INRIA), France * Peter Thoman, University of Innsbruck, Austria * James D. Trotter, Simula, Norway * Didem Unat, Koç University, Turkey * Alejandro Valero, Universidad de Zaragoza, Spain * Ben van Werkhoven, Leiden University, Netherlands eScience Center, Netherlands * Lilia Zaourar, French Alternative Energies and Atomic Energy Commission (CEA), France * Zhengji Zhao, National Energy Scientific Computing Centre, Lawrence Berkeley National Laboratory, USA === Submission Guidelines === For more information consult the PMBS Workshop homepage at: https://urldefense.us/v3/__https://pmbs-workshop.github.io__;!!G_uCfscf7eWS!...