Dear Colleagues, Network-on-Chip emerged in recent years as a viable solution for the design of manycore embedded systems of the next generation. However, communication infrastructure scalability, memory bottleneck and parallelization of tasks, just to cite few examples, are becoming the limiting factors that hardware designers and software developers will be facing in the upcoming years. This Special Issue on “Emerging Network-on-Chip Architectures for Low Power Embedded Systems” will focus on emerging approaches and recent advances on architectures, design techniques, modeling and prototyping solutions for the design of power/performance efficient Network-on-Chip systems in the manycore era. Dr. Davide Patti Guest Editor Deadline for manuscript submissions: 31 Jan 2017 http://www.mdpi.com/journal/jlpea/special_issues/embedded_systems Keywords - Power Management algorithms and strategies for manycore architectures - Novel architectures for embedded low power computing - Energy-aware Parallel architectures for high performance computing - Design Platforms and Tools for optimizing energy/performance tradeoffs - New trends in Network-on-Chip architectures