On Fri, May 29, 2015 at 3:56 PM, Jed Brown <jed@jedbrown.org> wrote:
Mark Adams <mfadams@lbl.gov> writes:
> Yea, I realized that VecAssembly should see this load imbalance unless it
> had a barrier before its timer.  So I'm not sure what is going on.

Since you don't have any outgoing entries, I think the huge
MPI_Allreduce is expensive.  No surprise.

This is on Edison and this was not a problem a few months ago.  Edison could have changed however.