February 2011 - hpc-announce - mailman3.cels.anl.gov

CACHES 2011: The First International Workshop on Characterizing Applications for Heterogeneous Exascale Systems
by Gregory Diamos 24 Feb '11

24 Feb '11

===================================================================== The First International Workshop on Characterizing Applications for Heterogeneous Exascale Systems (CACHES 2011) held in conjunction with the 25th International Conference on Supercomputing (ICS 2011) Tucson, Arizona, June 4, 2011 http://www.mcs.anl.gov/events/workshops/caches/2011 ===================================================================== CALL FOR PAPERS --------------- As we look forward to the exascale era, heterogeneous parallel machines with accelerators, such as GPUs, FPGAs, and upcoming on-chip accelerator cores, are expected to play a massive role in architecting the largest systems in the world. While there is significant interest in accelerator- based architectures, much of this interest is an artifact of the hype associated with them. However, without understanding the behavior of detailed kernels or even entire applications on these architectures, it is unclear how future systems would be designed based on these architectures. For accelerator-based heterogeneous systems to truly be a successful High Performance Computing platform, it is important that we obtain a complete picture of HPC applications and learn the opportunities and challenges these architectures raise. This workshop aims at providing a platform where the characteristics of computational kernels and applications, and how different software stacks impact them, are presented to the research community to guide future accelerator-based HPC system designs. SUBMISSIONS ----------- We solicit papers on all aspects of HPC application studies, especially those that involve accelerators such as GPUs, FPGAs, etc. The topics include (but are not limited to): * Categorizing/characterizing of HPC applications and kernels with respect to patterns in computation structure, communication, cache accesses, memory, I/O, and file accesses. * Evaluating the importance of individual kernels within an entire application. * Modeling for applications running on accelerator-based heterogeneous HPC systems. * Implication of workload characterization in heterogeneous design issues. * Benchmarking of applications, kernels or software stacks and tools supporting applications. Submitted manuscripts are expected to be within 8 pages and should be formatted using the ACM SIG Proceedings alternate style (single-spaced, double-column format). All papers will be subjected to blind reviews. The submission site is http://www.easychair.org/conferences/?conf=caches2011 SPECIAL JOURNAL ISSUE --------------------- The workshop proceedings will be published electronically with the ICS proceedings via the ACM Digital Library. Selected papers will be published in the Journal of High Performance Computing Applications (JHPCA) with a special issue titled "Applications for the Heterogeneous Computing Era". IMPORTANT DATES --------------- * Submission deadline: Mar. 3rd, 2011, 11:59 PDT * Author Notification: Mar. 31st, 2011 * Camera-ready deadline: April 14th, 2011 WORKSHOP CHAIRS --------------- Jiayuan Meng, Argonne National Laboratory Pavan Balaji, Argonne National Laboratory PUBLICITY AND CYBER CHAIR ------------------------- Gregory Diamos, Georgia Institute of Technology PROGRAM COMMITTEE ----------------- David Bader Georgia Institute of Technology, USA Taisuke Boku Tsukuba University, Japan Surendra Byna Lawrence Berkeley National Laboratory, USA Jonathan Cohen NVIDIA Corporation, USA Torsten Hoefler National Center for Supercomputing Applications, USA Hyesoon Kim Georgia Institute of Technology, USA Sriram Krishnamoorthy Pacific Northwest National Laboratory, USA Heshan Lin Virginia Polytechnic Institute and State University, USA Yutong Lu National University of Defense Technologies, China Dimitris Nikolopoulos University of Crete/FORTH, Greece John Owens University of California, Davis, USA P. Sadayappan Ohio State University, USA Allan Snavely University of California, San Diego Bronis de Supinski Lawrence Livermore National Laboratory, USA Jeffrey Vetter Oak Ridge National Laboratory, USA Thomas Wenisch University of Michigan, USA Yunquan Zhang Chinese Academy of Sciences, China WEBSITE ------- http://www.mcs.anl.gov/events/workshops/caches/2011 CONTACT ------- If you have any questions, please contact us at caches-chairs(a)mcs.anl.gov

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CCGrid 2011: Call for Tutorial Proposals
by Pavan Balaji 24 Feb '11

24 Feb '11

Experts in cluster, cloud and grid computing areas are invited to share their expertise with the community by submitting proposals for tutorials to be presented at the CCGrid '11 conference to be held in Newport Beach, CA, from May 23-26. The CCGrid '11 tutorials program will give attendees the opportunity to explore a wide variety of important topics related to cluster, cloud and grid computing and other related aspects. CCGrid '11 invites proposals for introductory, intermediate, and advanced tutorials, either full-day (six hours) or half-day (three hours). The deadline for submission is March 1st, 2011. More information on the CCGrid '11 Call for Tutorials can be found here: http://www.ics.uci.edu/~ccgrid11/Call%20for%20Tutorials.html CCGrid '11 website: http://www.ics.uci.edu/~ccgrid11 Regards, Pavan Balaji and Sushil K. Prasad CCGrid '11 Tutorials co-chairs -- Pavan Balaji http://www.mcs.anl.gov/~balaji

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Call For Papers: Intl. Workshop on Parallel Programming Models and Systems Software for HEC (P2S2)
by Hui Jin 21 Feb '11

21 Feb '11

CALL FOR PAPERS =============== Fourth International Workshop on Parallel Programming Models and Systems Software for High-end Computing (P2S2) Sept. 13th, 2011 To be held in conjunction with ICPP-2011: The 40th International Conference on Parallel Processing, Sept. 13-16, 2011, Taipei, Taiwan Website: http://www.mcs.anl.gov/events/workshops/p2s2 SCOPE ===== The goal of this workshop is to bring together researchers and practitioners in parallel programming models and systems software for high-end computing systems. Please join us in a discussion of new ideas, experiences, and the latest trends in these areas at the workshop. TOPICS OF INTEREST ================== The focus areas for this workshop include, but are not limited to: * Systems software for high-end scientific and enterprise computing architectures o Communication sub-subsystems for high-end computing o High-performance file and storage systems o Fault-tolerance techniques and implementations o Efficient and high-performance virtualization and other management mechanisms for high-end computing * Programming models and their high-performance implementations o MPI, Sockets, OpenMP, Global Arrays, X10, UPC, Chapel, Fortress and others o Hybrid Programming Models * Tools for Management, Maintenance, Coordination and Synchronization o Software for Enterprise Data-centers using Modern Architectures o Job scheduling libraries o Management libraries for large-scale system o Toolkits for process and task coordination on modern platforms * Performance evaluation, analysis and modeling of emerging computing platforms PROCEEDINGS =========== Proceedings of this workshop will be published in CD format and will be available at the conference (together with the ICPP conference proceedings). The accepted papers will be included in and indexed by the IEEE digital library. SUBMISSION INSTRUCTIONS ======================= Submissions should be in PDF format in U.S. Letter size paper. They should not exceed 10 pages (all inclusive). Submissions will be judged based on relevance, significance, originality, correctness and clarity. Please visit workshop website at: http://www.mcs.anl.gov/events/workshops/p2s2/ for the submission link. IMPORTANT DATES =============== Paper Submission: March 3rd, 2011 Author Notification: May 3rd, 2011 Camera Ready: June 30th, 2011 Worksho Date: Sept. 13th, 2011 PROGRAM CHAIRS ============== * Pavan Balaji, Argonne National Laboratory * Abhinav Vishnu, Pacific Northwest National Laboratory * Yong Chen, Texas Tech University PUBLICITY CHAIR =============== * Hui Jin, Illinois Institute of Technology STEERING COMMITTEE ================== * William D. Gropp, University of Illinois Urbana-Champaign * Dhabaleswar K. Panda, Ohio State University * Vijay Saraswat, IBM Research PROGRAM COMMITTEE ================= * Ahmad Afsahi, Queen's University * George Almasi, IBM Research * Taisuke Boku, Tsukuba University * Ron Brightwell, Sandia National Laboratory * Surendra Byna, Lawrence Berkeley National Lab * Zhihui Du, Tsinghua University, China * Rahul Garg, IBM Research India, India * Torsten Hoefler, Univ. of Illinois at Urbana-Champaign * Zhiyi Huang, University of Otago, New Zealand * Hai Jin, Huazhong Univ. of Sci. and Tech., China * Darren J. Kerbyson, Pacific Northwest National Lab * Zhiling Lan, Illinois Institute of Technology * Doug Lea, State University of New York at Oswego * Heshan Lin, Virginia Tech * Sonia Sachs, Department of Energy * Bronis de Supinski, Lawrence Livermore National Laboratory * Guangming Tan,, Chinese Academy of Sciences * Rajeev Thakur, Argonne National Laboratory * Vinod Tipparaju, Oak Ridge National Laboratory * Jesper Traff, University of Vienna, Austria * Bharadwaj Veeravalli, National Univ. of Singapore * Weikuan Yu, Auburn University * Yunquan Zhang, Chinese Academy of Sciences If you have any questions, please contact us at p2s2-chairs(a)mcs.anl.gov

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IEEE HiPC 2011: Call for Papers
by Shrideep Pallickara 21 Feb '11

21 Feb '11

The 18th Annual IEEE International Conference on High Performance Computing (HiPC 2011) Authors are invited to submit original unpublished manuscripts that demonstrate current research in all areas of high performance computing including design and analysis of parallel and distributed systems, embedded systems, and their applications in scientific, engineering, and commercial areas. Topics of interest include but are not limited to: High-Performance Computing Parallel and Distributed Algorithms Parallel Languages and Programming Environments Load Balancing, Scheduling and Resource Management Resilient/Fault-Tolerant Algorithms and Systems Scientific/Engineering/Commercial Applications and Workloads Emerging Applications such as Biotechnology and Nanotechnology Cluster, Cloud, and Grid Cloud Computing Peer-to-peer Algorithms and Networks Heterogeneous Computing Interconnection Networks and Architectures Scalable Servers and Systems High Performance/Scalable Storage Systems Power-Efficient and Reconfigurable Architectures Compiler Technologies for High-Performance Computing Software Support and Advanced Micro-architecture Techniques Operating Systems for Scalable High-Performance Computing Manuscript Guidelines Submitted manuscripts should be structured as technical papers and may not exceed 10 letter size (8.5 x 11) pages including figures, tables and references using the IEEE format for conference proceedings (print area of 6-1/2 inches (16.51 cm) wide by 8-7/8 inches (22.51 cm) high, two-column format with columns 3-1/16 inches (7.85 cm) wide with a 3/8 inch (0.81 cm) space between them, single-spaced 10-point Times fully justified text). Submissions not conforming to these guidelines may be returned without review. Authors should submit the manuscript in PDF format and make sure that the file will print on a printer that uses letter size (8.5 x 11) paper. The official language of the meeting is English. Manuscript submission will start on April 4, 2011. Manuscript submission procedures will then be available over theWebathttp://www.hipc.org. Electronic submissions must be in the form of a readable PDF file. Manuscripts must be received by May 16, 2011. Manuscripts should demonstrate current research in any area of high performance computing. All manuscripts will be reviewed and will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. Authors may contact the Program Chair at the address below for further information or clarification. Notification of review decisions will be mailed by July 18, 2011. Camera-ready papers are due by August 18, 2011. A published proceedings will be available at the conference. Program Chair Satoshi Matsuoka, Tokyo Institute of Technology, Japan Important Dates (All deadlines are at midnight, US Eastern time) April 04, 2011 - Conference Paper Submission Begins May 16, 2011 - Conference Paper Submission Ends May 16, 2011 - Workshop Proposals Due July 18, 2011 - Notification of Acceptance/Rejection Aug 18, 2011 - Camera-Ready Paper Submission Sep 16, 2011 - Student Symposium Submissions Due Oct 15, 2011 - Student Symposium Accept/Reject Decisions Nov 14, 2011 - Early Registration Deadline Dec 18 - 21, 2011 - HiPC Conference in Bengaluru (Bangalore), India Additional details can be found at http://www.hipc.org/hipc2011/papers.php

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SC11 Call for Papers
by Rajeev Thakur 18 Feb '11

18 Feb '11

SC11: Call for Papers SC11, the premier annual international conference on high-performance computing, networking, and storage, will be held in Seattle, Washington, November 12-18, 2011. The Technical Papers Program at SC is the lead component for presenting the most timely and highest quality work in all areas in this field. The conference committee solicits 10 page, two-column submissions of excellent scientific quality. The committee will rigorously review all submissions using originality, technical soundness, timeliness, and impact as the predominant acceptance criteria. SC11 anticipates an acceptance rate of 20-25% and will value papers that focus on sustained performance and/or data intensive science. Awards will be presented for Best Paper and Best Student Paper. Extended versions of papers selected for the Best Paper and Best Student Paper Awards may be published in the journal Scientific Programming. Abstracts Due: Friday, April 1, 2011 Papers Due: Friday, April 8, 2011 Notification: Friday, July 1, 2011 Further information: http://sc11.supercomputing.org/?pg=papers.html Questions: papers(a)info.supercomputing.org SC11 Technical Papers Chairs Franck Cappello and Rajeev Thakur

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Announcing CACHES 2011
by Gregory Diamos 10 Feb '11

10 Feb '11

[Apologies if you got multiple copies of this email. If you'd like to opt out of these announcements, information on how to unsubscribe is available at the bottom of this email.] ===================================================================== The First International Workshop on Characterizing Applications for Heterogeneous Exascale Systems (CACHES 2011) held in conjunction with the 25th International Conference on Supercomputing (ICS 2011) Tucson, Arizona, June 4, 2011 http://www.mcs.anl.gov/events/workshops/caches/2011 ===================================================================== CALL FOR PAPERS --------------- As we look forward to the exascale era, heterogeneous parallel machines with accelerators, such as GPUs, FPGAs, and upcoming on-chip accelerator cores, are expected to play a massive role in architecting the largest systems in the world. While there is significant interest in accelerator- based architectures, much of this interest is an artifact of the hype associated with them. However, without understanding the behavior of detailed kernels or even entire applications on these architectures, it is unclear how future systems would be designed based on these architectures. For accelerator-based heterogeneous systems to truly be a successful High Performance Computing platform, it is important that we obtain a complete picture of HPC applications and learn the opportunities and challenges these architectures raise. This workshop aims at providing a platform where the characteristics of computational kernels and applications, and how different software stacks impact them, are presented to the research community to guide future accelerator-based HPC system designs. SUBMISSIONS ----------- We solicit papers on all aspects of HPC application studies, especially those that involve accelerators such as GPUs, FPGAs, etc. The topics include (but are not limited to): * Categorizing/characterizing of HPC applications and kernels with respect to patterns in computation structure, communication, cache accesses, memory, I/O, and file accesses. * Evaluating the importance of individual kernels within an entire application. * Modeling for applications running on accelerator-based heterogeneous HPC systems. * Implication of workload characterization in heterogeneous design issues. * Benchmarking of applications, kernels or software stacks and tools supporting applications. Submitted manuscripts are expected to be within 8 pages and should be formatted using the ACM SIG Proceedings alternate style (single-spaced, double-column format). All papers will be subjected to blind reviews. The submission site is http://www.easychair.org/conferences/?conf=caches2011 SPECIAL JOURNAL ISSUE --------------------- The workshop proceedings will be published electronically with the ICS proceedings via the ACM Digital Library. Selected papers will be published in the Journal of High Performance Computing Applications (JHPCA) with a special issue titled "Applications for the Heterogeneous Computing Era". IMPORTANT DATES --------------- * Submission deadline: Mar. 3rd, 2011, 11:59 PDT * Author Notification: Mar. 31st, 2011 * Camera-ready deadline: April 14th, 2011 WORKSHOP CHAIRS --------------- Jiayuan Meng, Argonne National Laboratory Pavan Balaji, Argonne National Laboratory PUBLICITY AND CYBER CHAIR ------------------------- Gregory Diamos, Georgia Institute of Technology PROGRAM COMMITTEE ----------------- David Bader Georgia Institute of Technology, USA Taisuke Boku Tsukuba University, Japan Surendra Byna Lawrence Berkeley National Laboratory, USA Jonathan Cohen NVIDIA Corporation, USA Torsten Hoefler National Center for Supercomputing Applications, USA Hyesoon Kim Georgia Institute of Technology, USA Sriram Krishnamoorthy Pacific Northwest National Laboratory, USA Heshan Lin Virginia Polytechnic Institute and State University, USA Yutong Lu National University of Defense Technologies, China Dimitris Nikolopoulos University of Crete/FORTH, Greece John Owens University of California, Davis, USA P. Sadayappan Ohio State University, USA Allan Snavely University of California, San Diego Bronis de Supinski Lawrence Livermore National Laboratory, USA Jeffrey Vetter Oak Ridge National Laboratory, USA Thomas Wenisch University of Michigan, USA Yunquan Zhang Chinese Academy of Sciences, China WEBSITE ------- http://www.mcs.anl.gov/events/workshops/caches/2011 CONTACT ------- If you have any questions, please contact us at caches-chairs(a)mcs.anl.gov ======================================================================== The hpc-announce mailing list has been setup to have a common mailing list to share information with respect to upcoming HPC related events. You are included in this mailing list based on your participation or interest in a previous HPC conference or other event. The purpose for providing a single mailing list is to allow participants to easily identify such emails, and if you feel that the number of such emails is too many, possibly even filter them to less-frequently-read folders. However, if you do not wish to receive any emails from hpc-announce, you can unsubscribe from the mailing list (https://lists.mcs.anl.gov/mailman/listinfo/hpc-announce) Once unsubscribed, we guarantee that you will not be added back in through participation in a different HPC related conference or event. You will need to send an email to hpc-announce-owner(a)mcs.anl.gov to be added back on. ========================================================================

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CFP -- AMD Fusion Developer Summit June 2011
by Bordoloi, Udeepta 08 Feb '11

08 Feb '11

[Sincere apologies to all for the duplicate emails on this CFP.] I, Udeepta Bordoloi (Udeepta.Bordoloi(a)amd.com<mailto:[email protected]>), as one of the chairs for the HPC track of the AMD Fusion Developer Summit, would like to invite you and your colleagues to submit a presentation proposal to this event. Partly due to the lack of specificity in the previous call for submissions with respect to the types of submissions that the summit is interested in, we have re-issued the call for submissions below and have extended the submission deadline to Friday, February 25, 2011. We would like to clarify that it is not a requirement to show results on AMD Fusion hardware. We invite all papers that demonstrate progress towards using AMD CPUs, GPUs and/or Fusion APUs. For example, work related to unified memory access between CPU and GPU, and/or unified and portable programming models (e.g., OpenCL) are of interest. Papers based on other software/hardware will be considered if they are in the context of moving towards OpenCL and Fusion-like systems. Please feel free to contact me if you have any questions at Udeepta.Bordoloi(a)amd.com<mailto:[email protected]>. If you need AMD GPUs to move your work towards OpenCL/AMD, please send me a note with a brief summary of your plan and I will forward your request to the right folks at AMD. https://amdfusion.wingateweb.com/portal/cfp/cfpLogin.ww Call For Proposals Calling All Heterogeneous Computing Pioneers - Present at the Inaugural AMD Fusion Developer Summit Event Date: June 13-16, 2011 Event Location: Bellevue, Washington Deadline for submissions: Friday, February 25, 2011 Notification of acceptance: Wednesday, March 16, 2011 In June 2011, developers, academics, industry leaders, and emerging innovators will convene in Bellevue, Washington at the inaugural AMD Fusion Developer Summit to learn about the AMD Fusion APU and the potential market opportunities it presents. Participants will engage in interactive sessions and hands-on labs to learn more about the APU's key features to deepen their knowledge of advance CPU and GPU programmability, and will leave the event with a better understanding of how software applications can take advantage of the technology for competitive differentiation. AMD invites pioneers in heterogeneous computing to share their work and research findings in the form of presentations, technical papers, or reports with this influential community. This event presents the opportunity for you to establish your position at the vanguard of this technology movement, advocate programming paradigms, garner support for industry standards, and network with other pioneers who will help define the future. Speaker benefits include: * Free conference admission * Three nights of compensated hotel accommodations (Monday, Tuesday, Wednesday) * VIP Speaker Event To submit your work for consideration, please provide us with the information requested in the form below. * Submit one form per proposal * Proposal topic areas include: Multimedia, Content Management, User Interface, Web, Security, Server and Datacenter, High Performance Computing, Programming Models, and Tools * There is no limit to the number of proposals you can submit. Each speaking session is expected to be 30 minutes in duration. * Each session room will be provided with basic AV set up: projector, screen, internet access, lavaliere microphone. You will use your own computer to present the final session. * You will be notified if your proposal is accepted for inclusion by Wednesday, March 16

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International Workshop on High-performance Infrastructure for Scalable Tools
by Nathan R. Tallent 08 Feb '11

08 Feb '11

[Apologies if you receive multiple copies of this email.] =============================================================================== First International Workshop on High-performance Infrastructure for Scalable Tools (WHIST 2011) Held as part of the 25th International Conference on Supercomputing (ICS 2011) Tucson, Arizona, June 4, 2011 http://whist-workshop.org =============================================================================== CALL FOR PAPERS Today's petascale supercomputers contain over 100,000 processor cores, and thread counts on exascale systems are expected to exceed 100 million. Increasingly complex multicore and accelerator node-architectures fuel the trend towards massive concurrency, and new, hierarchical parallel programming models will be necessary to take full advantage of future machines. With increased node, system, and application complexity, scalable tools will be critical for diagnosing the root causes of correctness and performance problems. To diagnose problems at the extreme scale, tools themselves are becoming more complex. Tools will require sophisticated infrastructure to monitor, measure, analyze, and present the causes of an execution's anomalies. In many cases, tools will combine online and offline analysis. They may use sophisticated modeling and statistical analysis techniques. To manage this complexity, there is a need both for abstractions that simplify tool design and for infrastructure that is reusable and extensible. SUBMISSIONS We solicit papers on all aspects of scalable tool abstractions and infrastructure, including (but not limited to): * Generic, reusable tool-infrastructure components * Tool-component interoperability * Tool-runtime design, including - Scalable data structures and data representation for tool runtimes - Scalable tool communication infrastructure - Tool and operating system interoperability * Scalable online and offline analysis techniques, including - Techniques for managing large amounts of information - Low-overhead online parallel data analysis techniques * Monitoring, measurement and analysis approaches for novel parallel programming models - Tool support for multithreading, shared-memory, and hierarchical parallelism, including interaction with language runtime and operating systems - Measurement and attribution techniques for new programming paradigms * Scalable presentation of results Visit http://whist-workshop.org for more information. SPECIAL JOURNAL ISSUE All papers from the workshop will be made available online, and selected papers will be published in a special journal issue. Details TBD. IMPORTANT DATES Full papers April 15, 2010, 11:59 PDT Notification May 6, 2010 ICS Conference May 31-June 4, 2010 PROGRAM CHAIRS Todd Gamblin, Lawrence Livermore National Laboratory Nathan Tallent, Rice University PROGRAM COMMITTEE Dorian Arnold, University of New Mexico Luiz DeRose, Cray Rob Fowler, Renaissance Computing Institute, University of North Carolina Karl Fuerlinger, Ludwig-Maximilians-Universität München Kevin Huck, Barcelona Supercomputing Center William Jalby, University of Versailles Saint Quentin Chee-Wai Lee, University of Oregon Allen Malony, University of Oregon Bart Miller, University of Wisconsin Bernd Mohr, Jülich Supercomputing Center Tipp Moseley, Google Phil Mucci, Samara Technologies Boyana Norris, Argonne National Laboratory Ramesh Peri, Intel Dan Reed, Microsoft Research Phillip Roth, Oak Ridge National Laboratory Barry Rountree, Lawrence Livermore National Laboratory Martin Schulz, Lawrence Livermore National Laboratory Sameer Shende, ParaTools Felix Wolf, Jülich Supercomputing Center, University of Aachen WEBSITE http://www.whist-workshop.org MORE INFORMATION For more information, please contact the program chairs at whist2011(a)easychair.org. ===============================================================================

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CFP -- AMD Fusion Developer Summit June 2011
by Bordoloi, Udeepta 08 Feb '11

08 Feb '11

Hi All, I and Prof. Wu Feng are the chairs for the HPC track of the AMD Fusion Developer Summit. Partly due to the lack of specificity in the previous call for submissions with respect to the types of submissions that the summit is interested in, we have re-issued the call for submissions below and have extended the submission deadline to Friday, February 25, 2011. We would like to clarify that it is not a requirement to show results on AMD Fusion hardware. We invite all papers that demonstrate progress towards using AMD CPUs, GPUs and/or Fusion APUs. For example, work related to unified memory access between CPU and GPU, and/or unified and portable programming models (e.g., OpenCL) are of interest. Papers based on other software/hardware will be considered if they are in the context of moving towards OpenCL and Fusion-like systems. Please feel free to contact me if you have any questions. If you need AMD GPUs to move your work towards OpenCL/AMD, please send me a note with a brief summary of your plan and I will forward your request to the right folks at AMD. https://amdfusion.wingateweb.com/portal/cfp/cfpLogin.ww Call For Proposals Calling All Heterogeneous Computing Pioneers - Present at the Inaugural AMD Fusion Developer Summit Event Date: June 13-16, 2011 Event Location: Bellevue, Washington Deadline for submissions: Friday, February 25, 2011 Notification of acceptance: Wednesday, March 16, 2011 In June 2011, developers, academics, industry leaders, and emerging innovators will convene in Bellevue, Washington at the inaugural AMD Fusion Developer Summit to learn about the AMD Fusion APU and the potential market opportunities it presents. Participants will engage in interactive sessions and hands-on labs to learn more about the APU's key features to deepen their knowledge of advance CPU and GPU programmability, and will leave the event with a better understanding of how software applications can take advantage of the technology for competitive differentiation. AMD invites pioneers in heterogeneous computing to share their work and research findings in the form of presentations, technical papers, or reports with this influential community. This event presents the opportunity for you to establish your position at the vanguard of this technology movement, advocate programming paradigms, garner support for industry standards, and network with other pioneers who will help define the future. Speaker benefits include: * Free conference admission * Three nights of compensated hotel accommodations (Monday, Tuesday, Wednesday) * VIP Speaker Event To submit your work for consideration, please provide us with the information requested in the form below. * Submit one form per proposal * Proposal topic areas include: Multimedia, Content Management, User Interface, Web, Security, Server and Datacenter, High Performance Computing, Programming Models, and Tools * There is no limit to the number of proposals you can submit. Each speaking session is expected to be 30 minutes in duration. * Each session room will be provided with basic AV set up: projector, screen, internet access, lavaliere microphone. You will use your own computer to present the final session. * You will be notified if your proposal is accepted for inclusion by Wednesday, March 16

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International Workshop on High-performance Infrastructure for Scalable Tools
by Nathan R. Tallent 07 Feb '11

07 Feb '11

[Apologies if you receive multiple copies of this email.] =============================================================================== First International Workshop on High-performance Infrastructure for Scalable Tools (WHIST 2011) Held as part of the 25th International Conference on Supercomputing (ICS 2011) Tucson, Arizona, June 4, 2011 http://whist-workshop.org =============================================================================== CALL FOR PAPERS Today's petascale supercomputers contain over 100,000 processor cores, and thread counts on exascale systems are expected to exceed 100 million. Increasingly complex multicore and accelerator node-architectures fuel the trend towards massive concurrency, and new, hierarchical parallel programming models will be necessary to take full advantage of future machines. With increased node, system, and application complexity, scalable tools will be critical for diagnosing the root causes of correctness and performance problems. To diagnose problems at the extreme scale, tools themselves are becoming more complex. Tools will require sophisticated infrastructure to monitor, measure, analyze, and present the causes of an execution's anomalies. In many cases, tools will combine online and offline analysis. They may use sophisticated modeling and statistical analysis techniques. To manage this complexity, there is a need both for abstractions that simplify tool design and for infrastructure that is reusable and extensible. SUBMISSIONS We solicit papers on all aspects of scalable tool abstractions and infrastructure, including (but not limited to): * Generic, reusable tool-infrastructure components * Tool-component interoperability * Tool-runtime design, including - Scalable data structures and data representation for tool runtimes - Scalable tool communication infrastructure - Tool and operating system interoperability * Scalable online and offline analysis techniques, including - Techniques for managing large amounts of information - Low-overhead online parallel data analysis techniques * Monitoring, measurement and analysis approaches for novel parallel programming models - Tool support for multithreading, shared-memory, and hierarchical parallelism, including interaction with language runtime and operating systems - Measurement and attribution techniques for new programming paradigms * Scalable presentation of results Visit http://whist-workshop.org for more information. SPECIAL JOURNAL ISSUE All papers from the workshop will be made available online, and selected papers will be published in a special journal issue. Details TBD. IMPORTANT DATES Full papers April 15, 2010, 11:59 PDT Notification May 6, 2010 ICS Conference May 31-June 4, 2010 PROGRAM CHAIRS Todd Gamblin, Lawrence Livermore National Laboratory Nathan Tallent, Rice University PROGRAM COMMITTEE Dorian Arnold, University of New Mexico Luiz DeRose, Cray Rob Fowler, Renaissance Computing Institute, University of North Carolina Karl Fuerlinger, Ludwig-Maximilians-Universität München Kevin Huck, Barcelona Supercomputing Center William Jalby, University of Versailles Saint Quentin Chee-Wai Lee, University of Oregon Allen Malony, University of Oregon Bart Miller, University of Wisconsin Bernd Mohr, Jülich Supercomputing Center Tipp Moseley, Google Phil Mucci, Samara Technologies Boyana Norris, Argonne National Laboratory Ramesh Peri, Intel Dan Reed, Microsoft Research Phillip Roth, Oak Ridge National Laboratory Barry Rountree, Lawrence Livermore National Laboratory Martin Schulz, Lawrence Livermore National Laboratory Sameer Shende, ParaTools Felix Wolf, Jülich Supercomputing Center, University of Aachen WEBSITE http://www.whist-workshop.org MORE INFORMATION For more information, please contact the program chairs at whist2011(a)easychair.org. ===============================================================================

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