May 2011 - hpc-announce - mailman3.cels.anl.gov

LCPC abstract and paper deadlines have been extended
by Michelle Strout 26 May '11

26 May '11

Due to requests from authors, we have extended the LCPC deadlines. Here are the new deadlines: Important Dates: Abstracts: May 27, 2011, extended to June 3rd Full papers: June 3, 2011, extended to June 10th Notification: July 27, 2011 Final paper: Aug 29, 2011 Workshop: Sept 8-10, 2011 The 24th International Workshop on Languages and Compilers for Parallel Computing Colorado State University, Fort Collins, Colorado September 8-10, 2011 The LCPC workshop (http://lcpc11.cs.colostate.edu/) is a forum for sharing cutting-edge research on all aspects of parallel languages, compilers and related topics including runtime systems and tools. The scope of the workshop spans foundational results and practical experience, and all classes of parallel processors including concurrent, multithreaded, multicore, accelerated, multiprocessor, and tightly-clustered systems. Given the rise of multicore processors, LCPC is particularly interested in work that seeks to transition parallel programming into the computing mainstream. Specific topics of interest include (but are not limited to): • Parallel programming models and languages • Compiling for parallelism • Automatic parallelization • Analysis, optimization, and verification of parallel programs • Parallel runtime systems • Parallel libraries • Parallel application frameworks • Performance analysis tools • Debugging tools for parallel programs • Parallel algorithms • Parallel applications • Concurrent data structures • Synchronization and concurrency control • Software engineering for parallel programs • Fault tolerance for parallel systems • Adaptive compilation and optimization of parallel programs • Software techniques for accelerators (including GPGPUs) Papers should report on original research, and should include enough background material to make them accessible to the entire LCPC research community. Papers describing experiences should indicate how they illustrate general principles; papers about parallel programming foundations should indicate how they relate to practice. All submissions must be made electronically through the submission link in the web site. Abstracts must include contact information, the full list of authors and their affiliations, and a summary description (100-300 words) of the anticipated content of the paper. LCPC 2011 papers are limited to 15 pages in the Springer LNCS format. Papers must be submitted in PDF format and must be viewable by Adobe Acrobat Reader. The proceedings will be published by Springer. Authors of accepted papers and posters will be required to sign the Springer copyright form. The submission website will be available by early May. Instructions for preparing papers for the proceedings will be emailed to authors of accepted papers. This year, the Third Annual Workshop on Concurrent Collections will be co-located with LCPC on September 7, 2011. (http://cnc11.rice.edu/) ================================== Michelle Mills Strout Associate Professor Colorado State University Computer Science Department 1873 Campus Delivery Fort Collins, CO 80523-1873 (970) 491-4193 mstrout(a)cs.colostate.edu ==================================

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Re: [hpc-announce] 2nd Call for Papers: Resilience@Euro-Par 2011
by Gentile, Ann 25 May '11

25 May '11

4th Workshop on Resiliency in High Performance Computing (Resilience) in Clusters, Clouds, and Grids in conjunction with the 17th International European Conference on Parallel and Distributed Computing (Euro-Par 2011) Bordeaux France, August 29 - September 2nd, 2011 Clusters, Clouds, and Grids are three different computational paradigms with the intent or potential to support High Performance Computing (HPC). Currently, they consist of hardware, management, and usage models particular to different computational regimes, e.g., high performance cluster systems designed to support tightly coupled scientific simulation codes typically utilize high-speed interconnects and commercial cloud systems designed to support software as a service (SAS) do not. However, in order to support HPC, all must at least utilize large numbers of resources and hence effective HPC in any of these paradigms must address the issue of resiliency at large-scale. Recent trends in HPC systems have clearly indicated that future increases in performance, in excess of those resulting from improvements in single- processor performance, will be achieved through corresponding increases in system scale, i.e., using a significantly larger component count. As the raw computational performance of these HPC systems increases from today's tera- and peta-scale to next-generation multi peta-scale capability and beyond, their number of computational, networking, and storage components will grow from the ten-to-one-hundred thousand compute nodes of today's systems to several hundreds of thousands of compute nodes and more in the foreseeable future. This substantial growth in system scale, and the resulting component count, poses a challenge for HPC system and application software with respect to fault tolerance and resilience. Furthermore, recent experiences on extreme-scale HPC systems with non-recoverable soft errors, i.e., bit flips in memory, cache, registers, and logic added another major source of concern. The probability of such errors not only grows with system size, but also with increasing architectural vulnerability caused by employing accelerators, such as FPGAs and GPUs, and by shrinking nanometer technology. Reactive fault tolerance technologies, such as checkpoint/restart, are unable to handle high failure rates due to associated overheads, while proactive resiliency technologies, such as migration, simply fail as random soft errors can't be predicted. Moreover, soft errors may even remain undetected resulting in silent data corruption. Important Web sites: Resilience 2011 at http://xcr.cenit.latech.edu/resilience2011 Euro-Par 2011 at http://europar2011.bordeaux.inria.fr Prior conferences Web sites: Resilience 2010 at http://xcr.cenit.latech.edu/resilience2010 Resilience 2009 at http://xcr.cenit.latech.edu/resilience2009 Resilience 2008 at http://xcr.cenit.latech.edu/resilience2008 Important dates: Paper submission deadline on June 5, 2011 Notification deadline on July 4, 2011 Resilience Workshop on August 30, 2011 Euro-Par conference on August 29 - September 2nd, 2011 Camera ready deadline is after the workshop Topics of interest include, but are not limited to: Reports on current HPC system and application resiliency HPC resiliency metrics and standards HPC system and application resiliency analysis HPC system and application-level fault handling and anticipation HPC system and application health monitoring Resiliency for HPC file and storage systems System-level checkpoint/restart for HPC System-level migration for HPC Algorithm-based resiliency fundamentals for HPC (not Hadoop) Fault tolerant MPI concepts and solutions Soft error detection and recovery in HPC systems HPC system and application log analysis Statistical methods to identify failure root causes Fault injection studies in HPC environments High availability solutions for HPC systems Reliability and availability analysis Hardware for fault detection and recovery Resource management for system resiliency and availability General Co-Chairs: Stephen L. Scott, Oak Ridge National Laboratory, USA Chokchai (Box) Leangsuksun, Louisiana Tech University, USA Program Chair: Christian Engelmann, Oak Ridge National Laboratory, USA Publication Co-Chairs: James Brandt, Sandia National Laboratories, USA Ann Gentile, Sandia National Laboratories, USA Program Committee: - Vassil Alexandrov, Barcelona Supercomputing Center, Spain - David E. Bernholdt, Oak Ridge National Laboratory, USA - George Bosilca, University of Tennessee, USA - Jim Brandt, Sandia National Laboratories, USA - Patrick G. Bridges, University of New Mexico - Greg Bronevetsky, Lawrence Livermore National Laboratory, USA - Franck Cappello, INRIA/UIUC, France/USA - Kasidit Chanchio, Thammasat University, Thailand - Zizhong Chen, Colorado School of Mines, USA - Nathan DeBardeleben, Los Alamos National Laboratory, USA - Jack Dongarra, University of Tennessee, USA - Christian Engelmann, Oak Ridge National Laboratory, USA - Yung-Chin Fang, Dell, USA - Kurt B. Ferreira, Sandia National Laboratories, USA - Ann Gentile, Sandia National Laboratories, USA - Cecile Germain, University Paris-Sud, France - Rinku Gupta, Argonne National Laboratory, USA - Paul Hargrove, Lawrence Berkeley National Laboratory, USA - Xubin He, Virginia Commonwealth University, USA - Larry Kaplan, Cray, USA - Daniel S. Katz, University of Chicago, USA - Thilo Kielmann, Vrije Universiteit Amsterdam, Netherlands - Dieter Kranzlmueller, LMU/LRZ Munich, Germany - Zhiling Lan, Illinois Institute of Technology, USA - Chokchai (Box) Leangsuksun, Louisiana Tech University, USA - Xiaosong Ma, North Carolina State University, USA - Celso Mendes, University of Illinois at Urbana Champaign, USA - Christine Morin, INRIA Rennes, France - Thomas Naughton, Oak Ridge National Laboratory, USA - George Ostrouchov, Oak Ridge National Laboratory, USA - DK Panda, The Ohio State University, USA - Mihaela Paun, Louisiana Tech University, USA - Alexander Reinefeld, Zuse Institute Berlin, Germany - Rolf Riesen, IBM Research, Ireland - Eric Roman, Lawrence Berkeley National Laboratory, USA - Stephen L. Scott, Oak Ridge National Laboratory, USA - Jon Stearley, Sandia National Laboratories, USA - Gregory M. Thorson, SGI, USA - Geoffroy Vallee, Oak Ridge National Laboratory, USA - Sudharshan Vazhkudai, Oak Ridge National Laboratory, USA

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LCPC call for papers
by Michelle Strout 20 May '11

20 May '11

The 24th International Workshop on Languages and Compilers for Parallel Computing Colorado State University, Fort Collins, Colorado September 8-10, 2011 The LCPC workshop (http://lcpc11.cs.colostate.edu/) is a forum for sharing cutting-edge research on all aspects of parallel languages, compilers and related topics including runtime systems and tools. The scope of the workshop spans foundational results and practical experience, and all classes of parallel processors including concurrent, multithreaded, multicore, accelerated, multiprocessor, and tightly-clustered systems. Given the rise of multicore processors, LCPC is particularly interested in work that seeks to transition parallel programming into the computing mainstream. Specific topics of interest include (but are not limited to): • Parallel programming models and languages • Compiling for parallelism • Automatic parallelization • Analysis, optimization, and verification of parallel programs • Parallel runtime systems • Parallel libraries • Parallel application frameworks • Performance analysis tools • Debugging tools for parallel programs • Parallel algorithms • Parallel applications • Concurrent data structures • Synchronization and concurrency control • Software engineering for parallel programs • Fault tolerance for parallel systems • Adaptive compilation and optimization of parallel programs • Software techniques for accelerators (including GPGPUs) Papers should report on original research, and should include enough background material to make them accessible to the entire LCPC research community. Papers describing experiences should indicate how they illustrate general principles; papers about parallel programming foundations should indicate how they relate to practice. All submissions must be made electronically through the submission link in the web site. Abstracts must include contact information, the full list of authors and their affiliations, and a summary description (100-300 words) of the anticipated content of the paper. LCPC 2011 papers are limited to 15 pages in the Springer LNCS format. Papers must be submitted in PDF format and must be viewable by Adobe Acrobat Reader. The proceedings will be published by Springer. Authors of accepted papers and posters will be required to sign the Springer copyright form. The submission website will be available by early May. Instructions for preparing papers for the proceedings will be emailed to authors of accepted papers. This year, the Third Annual Workshop on Concurrent Collections will be co-located with LCPC on September 7, 2011. (http://cnc11.rice.edu/) Important Dates: Abstracts: May 27, 2011 Full papers: June 3, 2011 Notification: July 27, 2011 Final paper: Aug 29, 2011 Workshop: Sept 8-10, 2011 ================================== Michelle Mills Strout Associate Professor Colorado State University Computer Science Department 1873 Campus Delivery Fort Collins, CO 80523-1873 (970) 491-4193 mstrout(a)cs.colostate.edu ==================================

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IMUDI 2011: Special Session on Improving MPI User and Developer Interaction
by Dries Kimpe 10 May '11

10 May '11

CALL FOR PAPERS --------------------------------------------------------------- IMUDI 2011 --------------------------------------------------------------- Special Session on Improving MPI User And Developer Interaction http://press.mcs.anl.gov/imudi2011/ Scope: The IMUDI special session, to be held as a full-day meeting at the EuroMPI 2011 conference in Santorini, Greece, focuses on bringing together the MPI end-user and MPI implementor communities through discussions on MPI usage experiences, techniques, and optimizations. This meeting will focus on evaluating the MPI standard from the perspective of the MPI end-user (application and library developers) and address concerns and insights of MPI implementors and vendors. Unlike workshops associated with other conferences, the IMUDI session is still considered to be a part of the Euro MPI conference. Submissions will be reviewed separately to facilitate bringing together research publications falling into these "special focus" areas. Topics of Interest: The topics include but are not limited to: - Software development and optimization challenges for MPI-based applications and libraries - Evaluation of existing MPI features and use cases by the MPI application and library development community - Analysis of MPI-based and alternative programming model implementations of applications and libraries - New techniques and features to improve the MPI programming model and usage by current MPI end-users - Analysis of the evolution of the MPI programming model and implementation for future HPC systems - Analysis of alternative programming model features implemented within MPI Author instructions: Authors are invited to submit full papers of at most 8 pages. Papers should be submitted in PDF format using the LNCS style described on the EuroMPI 2011 conference web site. Submissions should be sent to imudi2011(a)mcs.anl.gov Publication: Accepted papers will be published in the EuroMPI proceedings as part of Springer's LNCS series. Accepted contributions are expected to be presented by one of the authors at EuroMPI 2011 during the IMUDI special session. Session Organizers: Dries Kimpe, University of Chicago Jason Cope, Argonne National Laboratory Program Committee: To be announced. Important Dates: Submission of full papers: extended to May 20th, 2011 Author Notification: June 24th, 2011 Camera Ready papers due: July 10th, 2011 Conference: September 19-21, 2011

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IEEE HiPC 2011: Deadline extension
by Shrideep Pallickara 09 May '11

09 May '11

********************************************************************* C A L L F O R P A P E R S 18th IEEE International Conference on High Performance Computing (HiPC 2011) December 18-21, 2011 Bengaluru (Bangalore), INDIA http://www.hipc.org Paper Submission Deadline extended to May 23, 2011 ********************************************************************* IMPORTANT DATES April 04, 2011 Conference Paper Submission Begins May 23, 2011 Conference Paper Submission Ends May 16, 2011 Workshop Proposals Due July 18, 2011 Notification of Acceptance/Rejection Aug 18, 2011 Camera-Ready Paper Submission Sep 16, 2011 Student Symposium Submissions Due Oct 15, 2011 Student Symposium Accept/Reject Decisions Nov 19, 2011 Early Registration Deadline ------------------------------------------------------------------- The 18th annual IEEE International Conference on High Performance Computing (HiPC 2011) will be held in Bengaluru (Bangalore), India, during December 18-21, 2011. It will serve as a forum for researchers from around the world to present their current research efforts and findings, and will act as a venue for stimulating discussions and for highlighting high performance computing (HPC) activities in Asia. The conference has a history of attracting participation from reputed researchers from all over the world. HiPC 2011 will focus on the design and analysis of high performance computing and networking systems and their scientific, engineering, and commercial applications. In addition to technical sessions consisting of contributed papers, the conference will include invited presentations, a student research symposium, tutorials, and vendor presentations.The 17th meeting, held in Goa in December 2010, had 40 contributed papers chosen from 208 submissions from 22 countries; and more than 280 attendees. The 16th meeting, held in Kochi, India in December 2009, had 49 contributed papers that were selected from 261 submissions from 20 countries, and about 225 participants attended the meeting. The 15th meeting, held in Bangalore, India in December 2008, had 46 contributed papers that were selected from over 317 submissions and approximately 250 participants attended the meeting. The HiPC attendance is approximately 300 with a good mix of participants from India and the rest of the world. Further information about HiPC 2010 and the HiPC series of meetings is available on the conference website at http://www.hipc.org. -------------------------------------------------------------------- CO-SPONSORED BY: * HPCwire - Platinum Media Sponsor * IEEE Computer Society Technical Committee on Parallel Processing (TCPP) - Pending * HiPC Education Trust IN COOPERATION WITH: * ACM SIGARCH - Pending ------------------------------------------------------------------- VENUE AND MEETING INFORMATION HiPC will be held at Bengaluru (Bangalore), India. The advance program will be available in July 2011. Please check the conference website at http://www.hipc.org for updated information. -------------------------------------------------------------------- ======================= HiPC 2010 CALL FOR PAPERS ======================= Authors are invited to submit original unpublished manuscripts that demonstrate current research in all areas of high performance computing including design and analysis of parallel and distributed systems, embedded systems, and their applications in scientific, engineering, and commercial areas. Topics of interest include but are not limited to: * High-Performance Computing * Parallel and Distributed Algorithms * Parallel Languages and Programming Environments * Load Balancing, Scheduling and Resource Management * Resilient/Fault-Tolerant Algorithms and Systems * Scientific/Engineering/Commercial Applications and Workloads * Emerging Applications such as Biotechnology and Nanotechnology * Cluster, Cloud, and Grid Cloud Computing * Peer-to-peer Algorithms and Networks * Heterogeneous Computing * Interconnection Networks and Architectures * Scalable Servers and Systems * High Performance/Scalable Storage Systems * Power-Efficient and Reconfigurable Architectures * Compiler Technologies for High-Performance Computing * Software Support and Advanced Micro-architecture Techniques * Operating Systems for Scalable High-Performance Computing --------------------------------------------------------------------- MANUSCRIPT GUIDELINES Submitted manuscripts should be structured as technical papers and may not exceed 10 letter size (8.5 x 11) pages including figures, tables and references using the IEEE format for conference proceedings (print area of 6-1/2 inches (16.51 cm) wide by 8-7/8 inches (22.51 cm) high, two-column format with columns 3-1/16 inches (7.85 cm) wide with a 3/8 inch (0.81 cm) space between them, single-spaced 10-point Times fully justified text). Submissions not conforming to these guidelines may be returned without review. Authors should submit the manuscript in PDF format and make sure that the file will print on a printer that uses letter size (8.5 x 11) paper. The official language of the meeting is English. Manuscript submission will start on April 4, 2011. Manuscript submission procedures will then be available over the Web at http://www.hipc.org. Electronic submissions must be in the form of a readable PDF file. Manuscripts must be received by May 16, 2011. Manuscripts should demonstrate current research in any area of high performance computing. All manuscripts will be reviewed and will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date, exceeding length limit, or not appropriately structured may also not be considered. Authors may contact the Program Chair at the address below for further information or clarification. Notification of review decisions will be mailed by July 18, 2011. Camera-ready papers are due by August 18, 2011. A published proceedings will be available at the conference. Program Chair: Satoshi Matsuoka Tokyo Institute of Technology, Japan Email: matsu at is.titech.ac.jp --------------------------------------------------------------------- WORKSHOPS Proposals are solicited for workshops to be held in conjunction with the main conference. Interested individuals should submit a proposal by May 16, 2011 to the Workshops Chair. Additional details and submission guidelines will be available at the conference website. Workshops Co-Chairs: Manimaran Govindarasu, Iowa State University, USA Email: gmani at iastate dot edu Pavan Balaji , ANL, USA Email: balaji at mcs.anl.gov --------------------------------------------------------------------- STUDENT RESEARCH SYMPOSIUM HiPC 2011 will feature the third student research symposium on High Performance Computing (HPC) aimed at stimulating and fostering student research, and providing an international forum to highlight student research accomplishments. The symposium will also expose students to the best practices in HPC in academia and industry. The one-day symposium will feature brief presentations by student authors on their research, followed by a poster exhibit. Short invited talks by leading HPC researchers/ practitioners will be included in the program. The Conference Reception and Student Symposium Poster Exhibits will provide an opportunity for students to interact with HPC researchers and practitioners (and recruiters) from academia and industry. To be considered, students should submit a 5 page extended abstract of their research. Submission procedures will be available at the Student Symposium web site, accessible from http://www.hipc.org, after August 17, 2011. For additional details, please see the conference web site or contact the Symposium Co-Chairs. Symposium Co-Chairs: Ashok Srinivasan Florida State University Email: student_symposium at hipc dot org Yogesh Simmhan University of Southern California Email: student_symposium at hipc dot org --------------------------------------------------------------------- INDUSTRY/USER SYMPOSIUM The HiPC Industry/User Symposium aims at bringing together the users / practitioners of HPC including both commercial and non-commercial users, and giving them a platform to share their challenges and successes, as well as to discuss relevant technology issues. Symposium Co-Chair: Jigar Halani Wipro, India Email: jigar.halani at wipro dot com --------------------------------------------------------------------- ============================== HiPC 2011 ORGANIZATION ============================== GENERAL CO-CHAIRS Manish Parashar, Rutgers University, USA Rajeev Muralidhar, Intel, India VICE GENERAL CO-CHAIRS Rajendra V. Boppana, University of Texas at San Antonio, USA Rama Govindaraju, Google, USA PROGRAM CHAIR Satoshi Matsuoka Tokyo Institute of Technology, Japan PROGRAM VICE CHAIRS Algorithms: Sanjay Ranka, University of Florida, USA Application: Gabrielle Allen, Lousiana State University, USA Architecture: Hiroshi Nakashima, Kyoto University, Japan Communication Networks: Dhabaleswar Panda, Ohio State University, USA Systems software: Andrew Lumsdaine, Indiana University STEERING CHAIR Viktor K. Prasanna, University of Southern California, USA WORKSHOPS CO-CHAIRS Manimaran Govindarasu, Iowa State University, USA Pavan Balaji, ANL, USA STUDENT RESEARCH SYMPOSIUM CO-CHAIRS Ashok Srinivasan, Florida State University, USA Yogesh Simmhan, University of Southern California, USA INDUSTRY/USER SYMPOSIUM CHAIR Jigar Halani, Wipro, India INDUSTRY LIAISON CO-CHAIRS Badri Ramamurthy, HP, India Milind Bhandarkar, LinkedIn, USA LOCAL COORDINATION CHAIR Santhosh Daivajna, 8KMiles, India INDUSTRY EXHIBITS COORDINATOR Kalyana Krishna, USA PUBLICATIONS CO-CHAIRS Sushil K. Prasad, Georgia State University, USA Raghavendra Hebbalalu, Intel, India PRODUCTION CHAIR Animesh Pathak, INRIA, France CYBER CHAIR Saima Aman, University of Southern California, USA FINANCE CO-CHAIRS Ajay Gupta, Western Michigan University, USA Thondiyil Venugopalan, India PUBLICITY CO-CHAIRS Shrideep Pallickara, Colorado State University, USA Chakravarthy Nagarajan, Wipro, India Dinesh Kaushik, KAUST, Saudi Arabia REGISTRATION CO-CHAIRS Sally Jelinek, Electronic Design Associates, USA Jyothsna Kasturirengan, Fiberlink, India STEERING COMMITTEE Srinivas Aluru, Iowa State University, USA, IIT Bombay, India P. Anandan, Microsoft Research, India David A. Bader, Georgia Institute of Technology, USA Ramamurthy Badrinath, HP, India Frank Baetke, HP, USA Luc Bougé, ENS Cachan, Brittany extension, France R. Govindarajan, Indian Institute of Science, India Rama Govindaraju, Google Inc., USA Manish Gupta, India Systems and Technology Lab, IBM, India Stefan Heinzel, Garching Computing Centre (RZG), Max Planck Society, Germany Victor Malyshkin, Russian Academy of Sciences, Russia Ashwini K. Nanda, HPC Research Inc. Siddhartha Nandi, NetApp, India Manish Parashar, NSF and Rutgers University, USA Ishwar Parulkar, Cisco, India Viktor K. Prasanna, University of Southern California, USA (Chair) Ramesh Rajagopalan, Dell India R&D, Bangalore, India Venkat Ramana, Cray-Hinditron, India Sartaj Sahni, University of Florida, USA Lokendra Shastri, Infosys, India Sunil Sherlekar, Intel, India Santosh Sreenivasan, Talentain Technologies, India V. Sridhar, SRM Research Institute, India Harrick M. Vin, Tata Research, Development and Design Center (TRDDC), Pune, India Steering Committee 2011 membership also includes the general co-chairs, program chairs and vice general co-chairs from 2010, 2011 and 2012.

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Fwd: EuroMPI Deadline Extension
by Rajeev Thakur 03 May '11

03 May '11

Begin forwarded message: > From: adanalis(a)eecs.utk.edu (Antonios Danalis) > Date: May 3, 2011 9:56:25 AM CDT > Subject: EuroMPI Deadline Extension > > [Our apologies if you receive multiple copies of this CFP] > > -- Submission deadline extended to May 15th -- > > > ********************************** > * EuroMPI 2011 Call for Papers * > * * > * Santorini, Greece * > * September 18-21, 2011 * > * * > * www.eurompi2011.org * > ********************************** > > > Important Dates: > > * Submission of full papers and poster abstracts: May 15th, 2011 > * Author Notification: June 12th, 2011 > * Camera Ready papers due: July 10th, 2011 > * Tutorials: September 18, 2011 > * Conference: September 19-21, 2011 > > BACKGROUND AND TOPICS > > EuroMPI is the primary meeting where the users and developers of MPI and other > message-passing programming environments can interact. The 18th European MPI > Users' Group Meeting will be a forum for the users and developers of MPI, but > also welcome hybrid programing models that combine message passing with > programming of modern architectures such as multi-core, or accelerators. > Through the presentation of contributed papers, poster presentations and > invited talks, attendees will have the opportunity to share ideas and > experiences to contribute to the improvement and furthering of message-passing > and related parallel programming paradigms. > > Topics of interest for the meeting include, but are not limited to: > > Algorithms using the message-passing paradigm > Applications in science and engineering based on message-passing > User experiences in programming heterogeneous systems using MPI > Tools and environments for programming heterogeneous systems using MPI > MPI implementation issues and improvements > Latest extensions to MPI > MPI for high-performance computing, clusters and grid environments > New message-passing and hybrid parallel programming paradigms > Interaction between message-passing software and hardware > Fault tolerance in message-passing programs > Performance evaluation of MPI applications > Tools and environments for MPI > > Submissions on applications demonstrating both the potential and shortcomings > of message passing programming and specifically MPI are particularly welcome. > > Proposals for co-located workshops are welcome. EuroMPI 2011 will also hold an > outstanding papers session, where the best papers selected by the program > committee will be presented. > Submission Information > > PAPER FORMAT > > Contributors are invited to submit a full paper as a PDF document not > exceeding 8 pages in English (2 pages for poster abstracts). The title page > should contain an abstract of at most 100 words and five specific keywords. > The paper needs to be formatted according to the Springer LNCS guidelines. The > usage of LaTeX for preparation of the contribution as well as the submission > in camera ready format is strongly recommended. Style files can be found at > Springer: > http://www.springer.com/computer/lncs?SGWID=0-164-2-793332-0&changeHeader > > New work that is not yet mature for a full paper, short observations, and > similar brief announcements are invited for the poster session. Contributions > to the poster session should be submitted in the form of a two page abstract. > All these contributions will be fully peer reviewed by the program committee. > Papers are to be submitted electronically via the online submission system at > http://www.easychair.org/conferences/?conf=eurompi2011 > > Information on the Special Session on Improving MPI User And Developer > Interaction that will be held in conjunction with EuroMPI can be found on the > session's website: > http://press.mcs.anl.gov/imudi2011/cfp/ > > IMUDI 2011 Important Dates > > Submission of full papers and poster abstracts: May 13th, 2011 > Author Notification: June 24th, 2011 > Camera Ready papers due: July 10th, 2011 > Conference: September 19-21, 2011 >

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CFP: Resilience@Euro-Par 2011
by Gentile, Ann 02 May '11

02 May '11

CFP: 4th Workshop on Resiliency in High Performance Computing (Resilience) in Clusters, Clouds, and Grids in conjunction with the 17th International European Conference on Parallel and Distributed Computing (Euro-Par 2011) Bordeaux France, August 29 - September 2nd, 2011 Clusters, Clouds, and Grids are three different computational paradigms with the intent or potential to support High Performance Computing (HPC). Currently, they consist of hardware, management, and usage models particular to different computational regimes, e.g., high performance cluster systems designed to support tightly coupled scientific simulation codes typically utilize high-speed interconnects and commercial cloud systems designed to support software as a service (SAS) do not. However, in order to support HPC, all must at least utilize large numbers of resources and hence effective HPC in any of these paradigms must address the issue of resiliency at large-scale. Recent trends in HPC systems have clearly indicated that future increases in performance, in excess of those resulting from improvements in single- processor performance, will be achieved through corresponding increases in system scale, i.e., using a significantly larger component count. As the raw computational performance of these HPC systems increases from today's tera- and peta-scale to next-generation multi peta-scale capability and beyond, their number of computational, networking, and storage components will grow from the ten-to-one-hundred thousand compute nodes of today's systems to several hundreds of thousands of compute nodes and more in the foreseeable future. This substantial growth in system scale, and the resulting component count, poses a challenge for HPC system and application software with respect to fault tolerance and resilience. Furthermore, recent experiences on extreme-scale HPC systems with non-recoverable soft errors, i.e., bit flips in memory, cache, registers, and logic added another major source of concern. The probability of such errors not only grows with system size, but also with increasing architectural vulnerability caused by employing accelerators, such as FPGAs and GPUs, and by shrinking nanometer technology. Reactive fault tolerance technologies, such as checkpoint/restart, are unable to handle high failure rates due to associated overheads, while proactive resiliency technologies, such as migration, simply fail as random soft errors can't be predicted. Moreover, soft errors may even remain undetected resulting in silent data corruption. Important Web sites: Resilience 2011 at http://xcr.cenit.latech.edu/resilience2011 Euro-Par 2011 at http://europar2011.bordeaux.inria.fr Prior conferences Web sites: Resilience 2010 at http://xcr.cenit.latech.edu/resilience2010 Resilience 2009 at http://xcr.cenit.latech.edu/resilience2009 Resilience 2008 at http://xcr.cenit.latech.edu/resilience2008 Important dates: Paper submission deadline on June 5, 2011 Notification deadline on July 4, 2011 Resilience Workshop on August 30, 2011 Euro-Par conference on August 29 - September 2nd, 2011 Camera ready deadline is after the workshop Topics of interest include, but are not limited to: Reports on current HPC system and application resiliency HPC resiliency metrics and standards HPC system and application resiliency analysis HPC system and application-level fault handling and anticipation HPC system and application health monitoring Resiliency for HPC file and storage systems System-level checkpoint/restart for HPC System-level migration for HPC Algorithm-based resiliency fundamentals for HPC (not Hadoop) Fault tolerant MPI concepts and solutions Soft error detection and recovery in HPC systems HPC system and application log analysis Statistical methods to identify failure root causes Fault injection studies in HPC environments High availability solutions for HPC systems Reliability and availability analysis Hardware for fault detection and recovery Resource management for system resiliency and availability

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Invitation from CACHES (in conjunction with ICS'11, June 4th, Tucson, Arizona)
by Jiayuan Meng 02 May '11

02 May '11

We cordially invite you to The First International Workshop on Characterizing Applications for Heterogeneous Exascale Systems (CACHES), to be held in conjunction with ICS'11 on June 4th at Tucson, Arizona. The goal of this workshop is to bring together researchers and practitioners who are interested in heterogeneous exascale systems, to discuss their ongoing research as well as future trends in these designs. We have researchers from academia, industry, and national labs to present their recent work. Last but not the least, don't miss the chance to let the "exascale" saguaro inspire your future research! The program is pasted below. For more details, please visit our website http://www.mcs.anl.gov/events/workshops/caches/2011/index.html. You can register through the ICS webpage at http://ics11.cs.arizona.edu/. Early registration is due May 7th. Best Regards, Jiayuan and Pavan CACHES Co-chairs ================================== 8:30-9:00 am: Opening Remarks by Workshop Co-chairs 9:30-10:30 am: Keynote Compiler Optimization for Heterogeneous Systems P. Sadayappan ================================== 10:00-10:30am: Break ================================== 10:30am-12:00pm: Session: Characterization of HPC Environments ----------------------------------------------------- Evaluation of Parallel Application-Level Behavioral Attributes Jeffrey Evans and Charles E Lucas Network-Theoretic Classification of Parallel Computation Patterns Sean Whalen, Sean Peisert and Matt Bishop Characterizing Application Runtime Behavior from System Logs and Metrics Raghul Gunasekaran, David Dillow, Galen Shipman, Richard Vuduc and Edmond Chow ================================== 12:00pm - 1:30pm: Lunch (on your own) ================================== 1:30pm - 3:00pm: Session: Optimization for Heterogeneity and Scalability ---------------------------------------------------- Characterization and Transformation of Unstructured Control Flow in GPU Applications Haicheng Wu, Gregory Diamos, Si Li and Sudhakar Yalamanchili OpenFOAM on a GPU-based Heterogeneous Cluster Rajat Phull, Srihari Cadambi, Nishkam Ravi and Srimat Chakradhar Platform IO DMA Transaction Acceleration Steen Larse and Ben Lee ================================== 3:00pm-3:30pm: Break ================================== 3:30pm - 5:00pm: Session: GPU-Accelerated HPC Applications: --------------------------------------------------- Computing Spherical Harmonic Transforms on CUDA-Compatible GPUs Fengshun Lu, Junqiang Song, Kaijun Ren, and Zhiqiang Liu Implementing Large-Scale FFT on Heterogeneous Multi-core System Yan Li,Haibo Lin,Jeffrey R. Diamond,Yudong Yang and Zhenxing Han Parameter Tuning of a Hybrid Treecode-FMM on GPUs Rio Yokota and Lorena Barba

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