October 2015 - hpc-announce - mailman3.cels.anl.gov

NDM'15: November 16, 2015 - Network-aware Data Management: ACM SIGHPC, IEEE/ACM SC'15 workshop
by Mehmet Balman 31 Oct '15

31 Oct '15

Apologies if you got multiple copies of this email. Please circulate this Call for Participation among your colleagues. ------------------------------------------------------------------------------------------ The 5th International Workshop on Network-aware Data Management (NDM'15) in cooperation with ACM SIGHPC, in conjunction with SC15: IEEE/ACM International Conference for High Performance Computing, Networking, Storage and Analysis, in Austin, Texas, USA. Website: http://ndm-meeting.org Date: November 16, 2015 (2:00pm-5:30pm) Location: Hilton 410 ------------------------------------------------------------------------------------------ * Program 2:00-2:05 Opening Remarks 2:05-2:35 Keynote Speech Network Integration with Workload Management - the PanDA Example Kaushik De (University of Texas at Arlington) 2:35-3:00 Managing Scientific Data with Named Data Networking (NDN) Susmit Shannigrahi (Colorado State University) 3:00-3:30 Coffee Break 3:30-3:55 A Multi-domain SDN for Dynamic Layer-2 Path Service Fatma AL-Ali (University of Virginia) 3:55-4:20 Design and Implementation of Control Sequence Generator for SDN-enhanced MPI Baatarsuren Munkhdorj (Osaka University) 4:20-4:45 Approximate Causal Consistency for Partially Replicated Geo-Replicated Cloud Storage Tayuan Hsu (University of Illinois at Chicago) 4:45-5:10 Hysteresis-based Optimization of Data Transfer Throughput Md S Q Zulkar Nine (University at Buffalo (SUNY) 5:10-5:30 Closing Remarks * Registration: Please visit http://sc15.supercomputing.org/register for more information. Workshop-Only Fees: Attendees can register workshops independent of the technical program. Workshop only registration is $200 ($100 for students) Workshop Fees with Technical Program Registration: SC14 technical program attendees receive a reduced rate of $90 ($40 for students) for workshop registration. * Scope: Today’s data centric environment both in industry and scientific domains depends on the underlying network infrastructure and its performance, to deliver highly distributed extreme-scale application workloads. As current technology enables faster storage devices and larger interconnect bandwidth, there is a substantial need for novel system design and middleware architecture to address increasing latency and scalability requirements. Furthermore, limitations in end-system architecture and system software design play an important role in many-core platforms. Traditional network and data management techniques are unlikely to scale to meet the needs of future data-intensive systems. We require new collaborations between data management and networking communities to develop intelligent networking middleware and efficient data management infrastructure. This workshop seeks contributions from academia, government, and industry to discuss future design principles of network-aware data management. We focus on emerging trends in resource coordination, data-aware scheduling, storage technologies, end-to-end performance, network-aware workflow management, high-performance networking, and network virtualization. * Workshop Organizers: Mehmet Balman, VMware, Inc. & Lawrence Berkeley National Laboratory Surendra Byna, Lawrence Berkeley National Laboratory Brian L. Tierney, Energy Sciences Network (ESnet) & Lawrence Berkeley National Laboratory * Program Committee: Pavan Balaji, Argonne National Laboratory and Northwestern University, USA Jerry Chou, National Tsing Hua University, Taiwan Constantine Dovrolis, Georgia Institute of Technology, USA Zhihui Du, Tsinghua University, China Renato J Figueiredo, University of Florida, USA Kartik Gopalan, State University of New York at Binghamton, USA Zhiyi Huang, University of Otago, New Zealand Raj Kettimuthu, Argonne National Laboratory and University of Chicago, USA Jinoh Kim, Texas A&M University-Commerce, USA Siva Kulasekaran, Texas Advanced Computing Center, USA Manish Parashar, Rutgers University, USA Eric Pouyoul, Energy Sciences Network and Lawrence Berkeley Lab, USA Yusuke Tanimura, National Institute of Advanced Industrial Science and Technology, Japan Malathi Veeraraghavan, University of Virginia, USA Venkat Vishwanath, Argonne National Laboratory, USA Chen Wu, ICRAR, The University of Western Australia, Australia Wenji Wu, Fermilab, USA Lei Xia, LinkedIn, USA Esma Yildirim, Fatih University, Turkey Michelle M. Zhu, Southern Illinois University, USA --------------------------------------------------------------------------------------------

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Call For Papers - HPBDC 2016 in conjunction with IPDPS 2016
by Xiaoyi Lu＠cse.osu 30 Oct '15

30 Oct '15

================================================================ IEEE International Workshop on High-Performance Big Data Computing (HPBDC) http://web.cse.ohio-state.edu/~luxi/hpbdc2016 In conjunction with the 30th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2016) May 27th, 2016, Chicago, Illinois USA ================================================================ WORKSHOP DESCRIPTION --------------------------------------- Managing and processing large volumes of data, or `Big Data', and gaining meaningful insights is a significant challenge facing the distributed computing community. This has significant impact in a wide range of domains including health care, bio-medical research, Internet search, finance and business informatics, and scientific computing. As data-gathering technologies and data-sources witness an explosion in the amount of input data, it is expected that in the future massive quantities of data in the order of hundreds or thousands of petabytes will need to be processed. Thus, it is critical that data-intensive computing middleware (such as Hadoop, HBase and Spark) to process such data are diligently designed, with high performance and scalability, in order to meet the growing demands of such Big Data applications. The explosive growth of Big Data has caused many industrial firms to adopt High Performance Computing (HPC) technologies to meet the requirements of huge amount of data to be processed and stored. Modern HPC systems and the associated middleware (such as MPI and Parallel File systems) have been exploiting the advances in HPC technologies (multi/many-core architectures, RDMA-enabled networking, NVRAMs and SSDs) during the last decade. However, Big Data middleware (such as Hadoop, HBase and Spark) have not embraced such technologies. These disparities are taking HPC and Big Data processing into `divergent trajectories'. The IEEE International Workshop on High-Performance Big Data Computing (HPBDC), aims to bring HPC and Big Data processing into a `convergent trajectory'. The workshop provides a forum for scientists and engineers in academia and industry to present their latest research findings in major and emerging topics for this field. HPBDC 2016 will be held in conjunction with the 30th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2016), Chicago, Illinois USA, Friday, May 27th, 2016. HPBDC 2016 welcomes original submissions in a range of areas, including but not limited to: * High-performance Big Data analytics frameworks, programming models, and tools * Performance optimizations for Big Data systems and applications with HPC technologies * High-performance in-memory computing technologies and abstractions * Performance modeling and evaluation for emerging Big Data Computing technologies * Big Data on HPC, Cloud, and Grid computing infrastructures * Fault tolerance, reliability and availability for high-performance Big Data Computing * Green Big Data Computing * Scientific Computing with Big Data Papers should present original research. As Big Data spans many disciplines, papers should provide sufficient background material to make them accessible to the broader community. SUBMISSION INFORMATION ---------------------------------------- All submissions should follow the IEEE standard 8.5x11 two-column format. Paper submissions should not exceed 10 pages. All the papers should be submitted through http://edas.info/newPaper.php?c=21560. All papers will be carefully reviewed by at least three reviewers. Papers should not be submitted in parallel to any other conference or journal. The proceedings of this workshop will be published together with the proceedings of other IPDPS 2016 workshops by the IEEE Computer Society Press. Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference. At least one of the authors of each accepted paper must register as a participant of the workshop and present the paper at the workshop, in order to have the paper published in the proceedings. IMPORTANT DATES ---------------------------- Abstract submission deadline: January 4th, 2016 (Anywhere on Earth) Paper submission deadline: January 11th, 2016 (Anywhere on Earth) Acceptance notification: February 14th, 2016 Camera-ready deadline: February 28th, 2016 Workshop: May 27th, 2016 WORKSHOP ORGANIZERS -------------------------------------- Dhabaleswar K. (DK) Panda, The Ohio State University Jianfeng Zhan, Institute of Computing Technology, Chinese Academy of Sciences, China Xiaoyi Lu, The Ohio State University PROGRAM COMMITTEE ---------------------------------- Chaitanya Baru, San Diego Supercomputer Center, National Science Foundation Rajesh Bordawekar, IBM Thomas J. Watson Research Center Yanpei Chen, Cloudera Geoffrey Fox, Indiana University Bloomington Bingsheng He, Nanyang Technological University, Singapore Lizy John, The University of Texas at Austin Xu Liu, The College of William and Mary Raghunath Nambiar, Cisco Manoj Nambiar, Tata Consultancy Services Ltd., India Ren Wu, NovuMind Li Zha, Institute of Computing Technology, Chinese Academy of Sciences, China Yunquan Zhang, Institute of Computing Technology, Chinese Academy of Sciences, China

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!!!DEADLINE EXTENSION!!! RAPIDO'16 co-located with HiPEAC Conference
by Gianluca Palermo 29 Oct '15

29 Oct '15

[Please accept our apologies if you receive multiple copies of this message.] ===================================================================== !!! DEADLINE EXTENDED: Nov. 8 !!! CALL FOR PAPERS 8th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools - RAPIDO (http://www.rapido.deib.polimi.it) in Prague, Czech Republic, 18 January, 2016 Held in conjunction with the HiPEAC Conference (http://www.hipeac.net/conference) Confirmed Keynote Speakers: - Khaled Benkrid, ARM - Jurgen Teich, University of Erlangen-Nuremberg - Tim Kogel, Synopsys ===================================================================== Goal of the Workshop : The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance system design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple (heterogeneous) processor cores, multiple levels of (shared/private) caches or memories, and dedicated accelerators, which will be glued together through a network on-chip (NoC). The design space is huge though and several design metrics should be considered as well for selecting the optimal system configuration. Despite several years of research, the early stage design phase still requires to be supported by innovative design methodologies and tools for simulation, exploartion and performance evaluation. RAPIDO seeks for original research papers that face this challenge for embedded and high performance computing systems. Topics of interest : Topics of interest include, but are not limited to: * Rapid simulation techniques targeted at novel architectures: Multi-cores, 3D-architectures, FPGA based heterogeneous Multi-cores/MPSoC, ... * Variability and power/energy consumption in performance estimation and simulation techniques. * High-level abstraction modeling, e.g., Transactional Level Modeling (TLM), Analytical Modeling, Trace-Driven Simulation … * Design space exploration (DSE) for heterogeneous high-performance and embedded systems. * Dynamic binary translation for fast simulation and DSE * Experience reports using existing simulators and tools * Benchmarking and simulator validation * Early stage prototype of innovative architectures Important dates: Submission deadline: Nov 8, 2015 (!!!EXTENDED!!!) Notification to authors: Nov 24, 2015 Final version of accepted papers: Dec 3, 2015 Paper submission : Electronic paper submission requires a full paper, up to 6 double-column ACM format pages, including figures and references. Up to 2 extra-pages can be requested for free to the organizing commettee (gianluca dot palermo at polimi dot it). Please use the following template when preparing your manuscript: http://www.acm.org/sigs/publications/proceedings-templates The paper submission will be conducted using the EasyChair conference manager. Papers should be submitted in PDF format. You will find the submission site at: https://easychair.org/conferences/?conf=rapido16 Accepted papers will be published in the ACM digital library. Organizers: Gianluca Palermo, Politecnico di Milano Daniel Gracia Pérez, Thales Research and Technology France Morteza Biglari-Abhari, University of Auckland Smail Niar, University of Valenciennes Daniel Chillet, Université de Rennes 1 Adam Morawiec, ECSI, France

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Soft Computing Journal Special Issue on: Autonomic Computing and Big Data Platforms
by Florin Pop 27 Oct '15

27 Oct '15

[Apologies if you got multiple copies of this email] Soft Computing Journal Special Issue on: Autonomic Computing and Big Data Platforms (AutoCompBD) http://www.springer.com/engineering/computational+intelligence+and+complexi… Scope and Objective The amount of data collected or generated by ICT systems is growing exponentially (today we reached a Petabyte Era, and will soon enter the ExaScale one). Processing and storing ever-larger volumes of data introduces new challenges, and consequently we need to constantly develop new technological means to face them. Massive parallel processing platforms are the answer, and are already being developed over distributed systems (i.e., over Cloud or Fog Computing). However, the problem is that such platforms need to support a wide variety of applications, coming with different processing requirements. Thus, self-* behavior is a must in this context, referring to self- managing characteristics of distributed computing resources, their capability to adapt to unpredictable changes while hiding intrinsic complexity to operators and users. This special issue is dedicated to dissemination and evaluation of advances in Autonomic Computing and Big Data Platforms, supported by large scale distributed systems (LSDS). Autonomic Computing is facilitated by self-management capabilities that modern LSDS introduce, such as self-configuration, self-healing, self-optimization, and self-protection properties. In LSDS, an important characteristic is dependability (defined in terms of reliability, availability, safety and security of the operating system). Increased dependability means the system has to be able to detect, recover and tolerate every possible deviation from its normal operation, and a wide area of Autonomic Computing research is today dedicated to this subject. The models used in the development of systems with dependability capabilities combine monitoring, scheduling, data management, security, and fault tolerance. The challenge is that in Big Data platforms applications and users, and even the distributed resources themselves, introduce unpredictable dynamic behavior. Autonomic Computing is considered one great challenge today faced by the IT industry, in need of finding good answers to how to conquer the growing complexity of large-scale systems and how to adequately cope with the many issues faced by truly Big Data processing. All these topics challenge today researchers, due to the strong dynamic behavior of the user communities and of resource collections they use. The special issue is oriented on computer and information advances aims to develop and optimize advanced system software, networking, and data management components to cope with Big Data processing and the introduction of Autonomic Computing capabilities for the supporting Large Scale Platforms. We consider that our special issue will come with new and novel added value in the domain of Autonomic Computing and Big Data Platforms. Topics of Interest This special issue calls for original papers describing the latest research and innovations, solutions and developments on Autonomic Computing and Big Data Platforms. The following is a non- exhaustive list of topics in focus of this special issue: • Dependable Large Scale Distributed Systems (Cloud, Grid, P2P, Virtualization) • Architecture of Big Data Platforms • Autonomic Computing (Architectures and Systems, Theory and Models) • Autonomic Large Scale Systems, Middleware, and Services • Autonomic computing and proactive computing for autonomous systems • Monitoring and Control in Large Scale distributed System • Distributed resource management systems • Adaptive Scheduling, Load balancing and Load sharing • Fault-tolerant Systems; Dependability in autonomous systems; Survivability and recovery in autonomous systems; Monitoring and control in autonomous systems; • Management of autonomous systems; • Self-optimizing software systems • Self-stabilization and dynamic stability criteria and mechanisms • Tools, languages and platforms for designing self-driven systems • Autonomic computing and proactive computing for autonomous systems • Practices, criteria and methods to implement, test, and evaluate industrial autonomic systems, and experiences with autonomic computing systems • Adaptive parallel applications • Novel approaches to modelling and representing context adaptability, self-adaptability, and self-manageability • Models of computation for self-management context-aware systems Submission guidelines The submitted papers must be original and must not be under consideration in any other venue. Papers will be peer reviewed by independent reviewers and selected based on originality, scientific quality and relevance to this Special Issue and will be accepted or rejected in line with the usual standards of Soft Computing Journal. The journal editors will make final decisions on the acceptance of the papers. Authors should prepare their manuscript according to the Guide for Authors available from the online submission page of the Soft Computing Journal at https://www.editorialmanager.com/soco/. Authors should select "SI: AutoCompBD" when they reach the "Article Type" step in the submission process. Guest Editors Florin Pop (Corresponding Editor, University Politehnica of Bucharest, Romania, e-mail: florin.pop[at]cs.pub.ro Ciprian Dobre, University Politehnica of Bucharest, Romania, e-mail: ciprian.dobre[at]cs.pub.ro Alexandru Costan, INRIA Rennes, France, e-mail: alexandru.costan[at]inria.fr

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Call for Participation: ScalA@SC'15 - November 16, 2015
by Christian Engelmann 27 Oct '15

27 Oct '15

We apologize if you receive multiple copies of this notice. ----------------------------------------------------------------------------- ScalA15: Workshop on Latest Advances in Scalable Algorithms for Large-Scale Systems held in conjunction with the SC15: The International Conference on High Performance Computing, Networking, Storage and Analysis in cooperation with ACM SIGHPC November 16, 2015 Salon K, Hilton Austin, 500 E 4th St, Austin, TX 78701 <http://www.csm.ornl.gov/srt/conferences/Scala/2015> Workshop Program • 09:00-09:05 Opening • 09:05-10:00 Keynote 1: "With Extreme Scale Computing the Rules Have Changed,” Jack Dongarra (University of Tennessee, Knoxville, USA) • 10:00-10:30 Coffee break (coffee provided) • 10:30-11:30 Keynote 2: "Next Generation Applications: What will be Hard and Easy, and How to Improve Our Approach,” Michael A. Heroux (Sandia National Laboratories, USA) • 11:30-11:50 Paper 1: "Tuning Stationary Iterative Solvers for Fault Resilience,” Hartwig Anzt (University of Tennessee, Knoxville, USA), Jack Dongarra (University of Tennessee, Knoxville, USA), and Enrique S. Quintana-Orti (Universidad Jaume I, Spain) • 11:50-12:10 Paper 2: "A Scalable Randomized Least squares solver for Dense overdetermined systems,” Chander Iyer (Rensselaer Polytechnic Institute, USA), Haim Avron (IBM Research - T. J. Watson Research Center, USA), Georgios Kollias (IBM Research - T. J. Watson Research Center, USA), Yves Ineichen (IBM Research - Zurich Research Lab, Switzerland), Chris Carothers (Rensselaer Polytechnic Institute, USA), and Petros Drineas (Rensselaer Polytechnic Institute, USA) • 12:10-12:30 Paper 3: "Mixed-precision Block Gram Schmidt Orthogonalization,” Ichitaro Yamazaki (University of Tennessee, Knoxville, USA), Stanimire Tomov (University of Tennessee, Knoxville, USA), Jakub Kurzak (University of Tennessee, Knoxville, USA), Jack Dongarra (University of Tennessee, Knoxville, USA), and Jesse Barlow (Pennsylvania State University, USA) • 12:30-14:00 Lunch break (lunch on your own) • 14:00-15:00 Keynote 3: "Facing the Four Frontiers,” David Keyes (KAUST, Saudi Arabia) • 15:00-15:30 Coffee break (coffee provided) • 15:30-16:30 Keynote 4: "Optimization of Communications towards Scalable Algorithms on Post Petascale Supercomputers,” Kengo Nakajima (The University of Tokyo, Japan) • 16:30-16:50 Paper 4: "A Parallel Ensemble Kalman Filter Implementation Based On Modified Cholesky Decomposition,” Elias D. Nino Ruiz (Universidad del Norte, Colombia and Virginia Tech, USA), Adrian Sandu (Virginia Tech, USA), and Xinwei Deng (Virginia Tech, USA) • 16:50-17:10 Paper 5: "Weighted Dynamic Scheduling with Many Parallelism Grains for Offloading of Numerical Workloads to Multiple Varied Accelerators,” Azzam Haidar (University of Tennessee, Knoxville, USA), Yulu Jia (University of Tennessee, Knoxville, USA), Piotr Luszczek (University of Tennessee, Knoxville, USA), Stanimire Tomov (University of Tennessee, Knoxville, USA), Asim Yarkhan (University of Tennessee, Knoxville, USA), and Jack Dongarra (University of Tennessee, Knoxville, USA) • 17:10-17:30 Paper 6: "On Efficient Monte Carlo Preconditioners and Hybrid Monte Carlo Methods for Linear Algebra,” Vassil Alexandrov (Barcelona Supercomputing Center, Spain) and Oscar Esquivel (Universidad Nacional Autonoma de Mexico, Mexico) -- Christian Engelmann, Ph.D. System Software Team Task Lead / R&D Staff Scientist Computer Science Research Group Computer Science and Mathematics Division Oak Ridge National Laboratory Mail: P.O. Box 2008, Oak Ridge, TN 37831-6173, USA Phone: +1 (865) 574-3132 / Fax: +1 (865) 576-5491 e-Mail: engelmannc(a)ornl.gov / Home: www.christian-engelmann.info

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CFP: The First IEEE Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware (IPDRM’2016)
by Song, Shuaiwen 27 Oct '15

27 Oct '15

CALL FOR PAPERS: The First IEEE Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware (IPDRM’2016) May 27th, 2016, Chicago Held in conjunction with The 30th IEEE International Parallel & Distributed Processing Symposium (IPDPS’16) Node architectures of extreme-scale systems are rapidly increasing in complexity. Emerging homogeneous and heterogeneous designs provide massive multi-level parallelism, but developing efficient runtime systems and middleware that allow applications to efficiently and productively exploit these architectures is extremely challenging. Moreover, current state-of-the-art approaches may become unworkable once energy consumption, resilience, and data movement constraints are added. The goal of this workshop is to attract the international research community to share new and bold ideas that will address the challenges of design, implementation, deployment, and evaluation of future runtime systems and middleware. Scope: This workshop will emphasize novel, disruptive research ideas over incremental advances. We will solicit papers on topics including, but not limited to, the following areas: Runtime System/Middleware Design, Evaluation and Usage * Runtime/Middleware for emerging HPC and cloud computing platforms * Runtime/Middleware for Big Data Computing * Modeling and Performance Analysis of Runtime Systems * Comparison studies of different runtime systems and middleware * Tuning and Optimization studies * Interactions between Runtime Systems and Middleware * Runtime-architecture co-design Constraints and Issues for Runtime Systems and Middleware * Energy- and Power-aware schemes * Fault Tolerance and Reliability * Scalable high-performance I/O and access to Big Data * Memory management * Runtime data analysis (e.g., in-situ analysis) * Real-time solutions and QOS * Virtualization, provisioning, and scheduling * Scalability of novel runtime systems and applications using them Design Principles and Programming Support * High-level programming models (e.g., thread and task based models, data parallel models, and stream programming) and domain-specific languages * Programming frameworks, parallel programming, and design methodologies * Methodologies and tools for runtime and middleware design, implementation, verification, and evaluation * Wild and crazy ideas on future Runtime System and Middleware Paper Submissions: We invite two kinds of submissions to this workshop: (1) Full-length research papers (8-page limit); (2) Short papers (4-page limit), which can take the form of position papers, experience reports, or surveys/comparisons of runtime systems and middleware. Papers should not exceed eight (or four) single-spaced pages (including figures, tables and references) using 12-point font on 8.5x11-inch pages. Submissions should follow the IEEE Conference Proceedings templates found at http://www.ieee.org/conferences_events/conferences/publishing/templates.html Camera-ready copy will need to conform to IPDPS guidelines; these will be announced during author notification. Submissions will be judged on correctness, originality, technical strength, significance, presentation quality, and appropriateness. Submitted papers should not have appeared in or under consideration for another venue. Important Dates: * Full papers (8 pages max): * Deadline: Jan. 22nd * Automatic Extension: Jan. 29th * Author notification: Feb. 12th * Camera-ready copy: Feb. 26th * Short papers (4 pages max): * Deadline: Jan. 29th * Automatic Extension: Feb. 5th * Author notification: Feb. 19th * Camera-ready copy: Feb. 26th All dates are AOE ("Anywhere on earth"). Workshop Co-Chairs: Shuaiwen Leon Song, PNNL Shuaiwen.Song(a)pnnl.gov Todd Gamblin, LLNL tgamblin(a)llnl.gov Publicity Chair Jingweijia Tan, University of Houston Proceeding Chair Albert Sidelnik, NVIDIA Research Web Chair Joseph Manzano, Pacific Northwest National Laboratory Program Committee Ananta Tiwari, San Diego Supercomputing Center, USA Huiyang Zhou, North Carolina State University, USA Felix Wolf, German Research School For Simulation Sciences, Germany Lizy Kurian John, University of Texas, Austin, USA Jeff Young, Georgia Tech, USA Benoit Meister, Reservoir Labs, USA Suren Byna, Lawrence Berkley National Lab, USA Siva Hari, NVIDIA Research, USA Zhijia Zhao, University of California, Riverside, USA Holger Fröning, Ruprecht-Karls University of Heidelberg, Germany Ioan Raicu, Illinois Institute of Technology, Argonne National Laboratory, USA Boyana Norris, University of Oregon, USA Prasanna Balaprakash, Argonne National Laboratory, USA Xu Liu, College of William and Mary, USA Bo Wu, Colorado School of Mines, USA Depanjon Sunguputa, Georgia Tech, USA Ang Li, Eindhoven University of Technology, Netherlands Marc Cass, Barcelona Supercomputing Center, Spain ----------------------------------------------------------------------------------------------- Shuaiwen Leon Song Staff Research Scientist High Performance Computing Group, Advanced Computing, Mathematics, and Data Division, Pacific Northwest National Lab (PNNL), Washington, US, Office:509-372-4189 Email: Shuaiwen.Song(a)pnnl.gov<mailto:[email protected]> HomePage: https://sites.google.com/site/shuaiwensongsresearch/ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ It is never too late to become what you might have been. ^ -- George Elliot ^ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

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CFP: Fourth International Workshop on OpenCL (IWOCL 2016)
by Simon McIntosh-Smith 27 Oct '15

27 Oct '15

* Call for Papers * Now in its fourth year, the International Workshop on OpenCL (IWOCL) will be hosted by TU Wien in Vienna, Austria, at the C3 Convention Center on April 19th-21th 2016. April 19th is reserved for an Advanced Hands On OpenCL tutorial with April 20th – 21st consisting of a mix of keynotes, academic papers, technical presentations, tutorials and poster sessions. We are inviting high-quality submissions in four categories: * Full Academic Papers. As in previous years these will undergo peer review by at least three reviewers each, with accepted papers being published in the ACM international conference proceedings series after the conference. * Technical Presentations. These are an opportunity to talk about work in progress or more industrially-focused work. Submission only requires an abstract, with slide sets being made available online via the conference website after the workshop. * Tutorials. We are inviting proposals for quarter day or half day tutorials on OpenCL-related topics. * Posters. These will be on show during the whole workshop. Submission is via an abstract and we will exhibit as many of high-quality posters as we can. IWOCL will publish formal proceedings of the accepted papers in The ACM International Conference Series (ACM ICPS). See: IWOCL 2013-14 ACM Proceedings, IWOCL 2015 (available shortly). Details of the selection criteria and how to submit your paper or tutorial proposal via EasyChair can be found in the official call for papers: http://www.iwocl.org/conf-2016/call-for-papers/ * Important Dates * Submission deadline: Friday 29th January, 2016 (23:59 Anywhere On Earth - AOE) Notification will be by the end of February 2016. We hope to see many of you at Vienna in April! With best wishes, Simon McIntosh-Smith, University of Bristol, on behalf of the IWOCL Steering Committee: Karl Rupp, TU Wien (local chair for IWOCL’16) Ben Bergen, Los Alamos National Laboratory David Kaeli, Northeastern University Tim Lewis, Croftedge Marketing Limited -- Head of the HPC group and University of Bristol Business Fellow High Performance Computing and Architectures, Department of Computer Science University of Bristol, Merchant Venturers Building, Woodland Road, Clifton, Bristol, BS8 1UB, UK Phone: +44 (0)117 331 5324, Twitter: simonmcs, Web: http://www.cs.bris.ac.uk/~simonm/ HPC Group webpage: http://uob-hpc.github.io

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Call for Papers: 3rd Workshop on Programming Models for SIMD/Vector Processing (WPMVP 2016)
by Eitzinger, Jan 27 Oct '15

27 Oct '15

WPMVP 2016: 3rd Workshop on Programming Models for SIMD/Vector Processing In conjunction with the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2016) Barcelona, Spain, March 12-16, 2016 http://conf.researchr.org/track/PPoPP-2016/PMSVP-2016-papers Important Dates: Fri 13 Nov 2015: Paper submission deadline Mon 14 Dec 2015: Notification of acceptance Mon 25 Jan 2016: Camera-ready copies due Motivation: SIMD processing is currently a main driver of performance in general purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be explicitly utilised by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and ispc are just examples for many choices available. Additionally, established optimising compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Scope: The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing. Topics of interests include, but are not restricted to: • Programming models for SIMD/vector processing • C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics) • New data parallel or streaming programming models for SIMD • Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages • Compilers & tools to discover and optimize SIMD parallelism • Case study, experience report, and performance analysis of SIMD/vector applications Call for Papers: Submitted papers must be no more than 8 pages in length. Authors are encouraged to use the ACM two-column format (http://www.sigplan.org/authorInformation.htm) Papers should be submitted in PDF format and should be legible when printed on a black-and-white printer. Each submission will receive at least three reviews from the technical program committee. Selected submissions will be invited to present at the workshop and be published in the workshop proceedings. Accepted papers will be published in the ACM digital library after the workshop. We especially encourage students to submit papers. There will be a special PPoPP 2016 student travel grant award which you can apply for. Authors must register and submit the paper through the online submission system at https://easychair.org/conferences/?conf=wpmvp2016. If you have problems accessing the system, e-mail your submission to jan.eitzinger(a)fau.de . -- Dr.-Ing. Jan Eitzinger, HPC Services Friedrich-Alexander-Universitaet Erlangen-Nuernberg Regionales RechenZentrum Erlangen (RRZE) Martensstrasse 1, 91058 Erlangen, Germany Tel. +49 9131 85-28911, Fax +49 9131 302941 mailto:[email protected] http://www.hpc.rrze.uni-erlangen.de/

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Deadline Extension for ARCS 2016: Extended Deadline to November 9th
by João M.P. Cardoso 26 Oct '15

26 Oct '15

============================================================================ === *C A L L F O R P A P E R S* 29th GI/ITG International Conference on *Architecture of Computing Systems* (ARCS 2016) Nuremberg, Germany, April 47, 2016 <http://www3.cs.fau.de/arcs2016/> http://www3.cs.fau.de/arcs2016/ *Extended Submission Deadline*: November 9, 2015 ============================================================================ === The ARCS series of conferences has a long tradition reporting high quality results in computer architecture and operating systems research. The focus of the 2016 conference will be on *Heterogeneity in Architectures and Systems - From Embedded to HPC*. In 2016, ARCS will be organized by the Department of Computer Science at the Friedrich-Alexander University Erlangen-Nürnberg (FAU). The ARCS 2016 proceedings will be published in the Springer Lecture Notes on Computer Science (LNCS) series. After the conference, it is planned that the authors of selected papers will be invited to submit an extended version of their contribution for publication in a special issue of the Journal of Systems Architecture (JSA). In addition, the best paper and the best presentation will be awarded during the conference. *Topics of ARCS include, but are not limited to* - Architectures and design methods/tools for robust, fault-tolerant, real-time embedded systems - Generic and application-specific accelerators in heterogeneous architectures, heterogeneous image systems - Distributed computing architectures, high-performance computing (HPC), and cloud computing - Cyber-physical systems, internet of things (IoT), Industry 4.0, and their applications - Multi-/manycore architectures, memory systems, and interconnection networks - Programming models, runtime systems, middleware, verification, and tool support for manycore systems - Operating systems including but not limited to scheduling, memory management, power management, and RTOS - Adaptive system architectures such as reconfigurable systems in hardware and software - Organic and autonomic computing including both theoretical and practical results on Self-X techniques - Energy awareness and green computing - System aspects of ubiquitous and pervasive computing such as sensor nodes, novel input/output devices, novel computing platforms, architecture modeling, and middleware - Architectures for robotics and automation systems - Performance modeling and engineering - Approximate computing *Important Dates* Paper submission deadline: Oct. 26, 2015 (Extended to Nov. 9, 2015) Workshop & tutorial proposals: Nov. 30, 2015 Notification of acceptance: Dec. 21, 2015 Camera-ready papers: Jan. 11, 2016 *Submission details and publication* Perspective authors are invited to submit original, unpublished research papers through the link provided at the conference website. Papers have to be submitted in PDF format. They must be formatted according to Springer LNCS style (see: <http://www.springer.de/comp/lncs/authors.html> http://www.springer.de/comp/lncs/authors.html) and must not exceed 12 pages. Proposals for workshops and tutorials within the technical scope of the conference are solicited. They should be done through email directly to the Workshop and Tutorial Chair. *Organizing Committee* General Co-Chairs - Dietmar Fey, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany - Wolfgang Schröder-Preikschat, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany - Jürgen Teich, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany Program Co-Chairs - Frank Hannig, Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany - João M. P. Cardoso, University of Porto, Portugal Workshop and Tutorial Chair - Ana Lucia Varbanescu, University of Amsterdam, The Netherlands Publication Chair - Thilo Pionteck, Universität zu Lübeck, Germany *Program Committee* - Michael Beigl, Karlsruhe Institute of Technology, Germany - Mladen Berekovic, TU Braunschweig, Germany - Simon Bliudze, EPFL, Switzerland - Florian Brandner, ENSTA ParisTech, France - Jürgen Brehm, University of Hannover, Germany - Uwe Brinkschulte, Goethe University Frankfurt, Germany - Luigi Carro, UFRGS, Brasil - Albert Cohen, INRIA, France - Nikitas Dimopoulos, University of Victoria, Canada - Ahmed El-Mahdy, E-JUST, Egypt - Fabrizio Ferrandi, Politecnico di Milano, Italy - Dietmar Fey, FAU, Germany - William Fornaciari, Politecnico di Milano, Italy - Björn Franke, University of Edinburgh, UK - Roberto Giorgi, University of Siena, Italy - Daniel Gracia Pérez, Thales Research & Technology, France - Jan Haase, Helmut Schmidt University, Germany - Jörg Hähner, Augsburg University, Germany - Jörg Henkel, Karlsruhe Institute of Technology, Germany - Andreas Herkersdorf, TU München, Germany - Christian Hochberger, TU Darmstadt, Germany - Michael Hübner, Ruhr-Universität Bochum, Germany - Gert Jervan, Tallinn University of Technology, Estonia - Ben Juurlink, TU Berlin, Germany - Wolfgang Karl, Karlsruhe Institute of Technology, Germany - Christos Kartsaklis, Oak Ridge National Laboratory, USA - Jörg Keller, Fernuniversität Hagen, Germany - Raimund Kirner, University of Hertfordshire, UK - Andreas Koch, TU Darmstadt, Germany - Hana Kubátová, FIT CTU, Prague, Czech Republic - Olaf Landsiedel, Chalmers Univ. of Technology, Sweden - Paul Lukowicz, University of Passau, Germany - Erik Maehle, Universität zu Lübeck, Germany - Christian Müller-Schloer, University of Hannover, Germany - Alex Orailoglu, UC San Diego, USA - Carlos Eduardo Pereira, UFRGS, Brazil - Luis Pinho, CISTER, ISEP, Portugal - Thilo Pionteck, Universität zu Lübeck, Germany - Pascal Sainrat, IRIT Université de Toulouse, France - Toshinori Sato, Fukuoka University, Japan - Wolfgang Schröder-Preikschat, FAU, Germany - Martin Schulz, Lawerence Livermore National Lab., USA - Leonel Sousa, IST/INESC-ID, Portugal - Rainer G. Spallek, TU Dresden, Germany - Olaf Spinczyk, TU Dortmund, Germany - Benno Stabernack, Fraunhofer HHI, Germany - Walter Stechele, TU München, Germany - Djamshid Tavangarian, Rostock University, Germany - Jürgen Teich, FAU, Germany - Martin Törngren, KTH, Sweden - Eduardo Tovar, ISEP-IPP, Portugal - Pedro Trancoso, University of Cyprus, Cyprus - Carsten Trinitis, TU München, Germany - Sascha Uhrig, Airbus, Germany - Theo Ungerer, University of Augsburg, Germany - Hans Vandierendonck, Queens University Belfast, UK - Stephane Vialle, SUPELEC, France - Lucian Vintan, Lucian Blaga University of Sibiu, Romania - Klaus Waldschmidt, Goethe University Frankfurt, Germany

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CFP: Graph Algorithm Building Blocks (with IEEE IPDPS'16)
by Aydin Buluc 26 Oct '15

26 Oct '15

[Apologies if you received multiple copies of this announcement] *Graph Algorithm Building Blocks (GABB) 2016 An IEEE IPDPS 2016 Workshop, May 23, 2016, Chicago, Illinois, USA* === Scope and Goals === The Basic Linear Algebra Subprograms, introduced over 30 years ago, had a transformative effect on software for linear algebra. With the BLAS, researchers spend less time mapping algorithms onto specific features of hardware platforms and more time on interesting new algorithms. Would it be practical to define an analogous set of basic building blocks for graph algorithms? Can we define a core set of mathematical primitives from which we can build most (if not all) important graph algorithms? If we can agree on the mathematical foundations, how would these interact with the data structures used in graph algorithms and result in an API the graph algorithms research community could support? These questions will be the topic for the second “Graph Algorithms Building Blocks” workshop. Our goal is an interactive workshop where the full range of issues behind “Graph Algorithms Building Blocks” will be explored. We want an interactive “workshop” so papers that report preliminary results and unproven but interesting ideas will also be considered. === Submission and Dates === Submitted manuscripts may not exceed ten (10) single-spaced double-column pages using 10-point size font on 8.5x11-inch pages (IEEE conference style), including figures, tables, and references (see IPDPS Call for Papers for more details). Papers shorter than 10 pages are welcome. All papers will be peer-reviewed. Proceedings of the workshops are distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference. *Important dates: * paper submissions due Jan 22, 2016, author notification: Feb 5, 2016, camera-ready due Feb 26, 2016. - Workshop web page: http://graphanalysis.org/workshop2016.html - Submission page (EDAS) will be linked from the workshop web page next month. === Program Committee === Tim Mattson, Intel Corp. (Chair) David A. Bader, Georgia Institute of Technology Jonathan Berry, Sandia National Labs Aydın Buluç, Lawrence Berkeley National Lab John Gilbert, UC Santa Barbara Jeremy Kepner, MIT Lincoln Labs Chris Long, US Department of Defense Kamesh Madduri, Penn State University Henning Meyerhenke, Karlsruhe Institute of Technology John Owens, University of California, Davis Fabrizio Petrini, IBM Sivan Toledo, Tel-Aviv University

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