December 2017 - hpc-announce - mailman3.cels.anl.gov

CFP: Heterogeneity in Computing Workshop (HCW; collocated with IPDPS 2018)
by Mohsen Amini 31 Dec '17

31 Dec '17

Call for Papers: 27th Heterogeneity in Computing Workshop (HCW; collocated with IPDPS 2018) <http://goog_1285231540/> http://hcw.eecs.wsu.edu/ ============================================================ ================================ The Twenty Seventh International Heterogeneity in Computing Workshop (HCW), May 21, 2018 Collocated with 32nd IEEE IPDPS 2018, May 21 - 25, 2018, Vancouver, British Columbia Canada Sponsored by the IEEE Computer Society, through the Technical Committee on Parallel Processing (TCPP), and by the U.S. Office of Naval Research (ONR). SUMMARY Most modern computing systems are heterogeneous, either for organic reasons because components grew independently as it is the case in desktop grids, or by design to leverage the strength of specific hardware as it is the case in accelerated systems. In any case, all computing systems have some form of hardware or software heterogeneity that must been managed, leveraged and understood. HCW is a venue to discuss and innovate in all theoretical and practical aspects of heterogeneous computing: programmability, modeling, design, applications, efficient utilization, algorithms, etc. TOPICS Topics of interest include but are not limited to the following areas: Heterogeneous multicore systems and architectures: Design, exploration, and experimental analysis of heterogeneous computing systems such as GPGPUs, heterogeneous systems-on-chip (SoC), accelerator systems (e.g., Xeon Phi), FPGAs, big.LITTLE, and application-specific architectures. Heterogeneous parallel and distributed systems: Design and analysis of computing grids, cloud systems, hybrid clusters, datacenters, geo-distributed computing systems, and supercomputers. Algorithms for heterogeneous systems: Parallel algorithms for solving problems on heterogeneous systems (multicores, hybrid clusters, grids or clouds); strategies for scheduling and allocation on heterogeneous 2D and 3D multicore architectures; scheduling and resource management on large-scale and parallel heterogeneous systems. Deep-memory hierarchies: Design and analysis of memory hierarchies with SRAM, DRAM, Flash/SSD and HDD technologies; NUMA architectures; cache coherence strategies; novel memory systems such as phase-change RAM, magnetic (e.g., STT) RAM, 3D Xpoint/crossbars, and memristors. On-chip and off-chip network architectures: Network-on-chip (NoC) architectures and protocols for heterogeneous multicores and heterogeneous applications; energy, latency, reliability, and security optimizations for NoCs; off-chip (chip-to-chip) network architectures and optimizations; large scale parallel and distributed network design, evaluation, and optimizations. Programming models and tools: Programming paradigms and tools for heterogeneous systems; middleware and runtime systems; performance-abstraction tradeoff; interoperability of heterogeneous software environments; workflows; dataflows. Modeling, characterization, and optimizations: Performance models and their use in the design of parallel and distributed algorithms for heterogeneous platforms, characterizations and optimizations for improving the time to solve a problem (throughput, latency, runtime), modeling and optimizing electric consumption (power, energy); modeling for failure management (fault tolerance, recovery, reliability); modeling for security in heterogeneous platforms. Applications on heterogeneous systems: Case studies; confluence of Big Data systems and heterogeneous systems; data-intensive computing; deep learning; scientific computing. IMPORTANT DATES *Paper submission: January 25, 2018 *Author notification: February 28, 2018 *Camera Ready: March 15, 2018 PAPER SUBMISSIONS Submissions will be done through the EasyChair. The page limit is 12 pages (papers can range from 6 to 12 pages). Please visit the HCW 2018 website ( http://hcw.eecs.wsu.edu) for instructions on how to submit. TECHNICAL PROGRAM COMMITTEE Sudeep Pasricha, Colorado State University, USA (TPC CHAIR) Domingo Gimenez, University of Murcia, Spain Florina M. Ciorba, University of Basel, Switzerland Hatem Ltaief, KAUST, Saudi Arabia Francois Tessier, Argonne National Laboratory, USA Matthias Diener, University of Illinois at Urbana-Champaign, USA C.J. Newburn, NVidia, USA Alexey Lastovetsky, University College Dublin, Ireland Dana Petcu, West University of Timisoara, Romania Daniel Cordeiro, University of São Paulo, Brazil Ioana Banicescu, Mississippi State University, USA Achim Streit, Karlsruhe Institute of Technology, Germany Louis-Claude Canon, Université de Franche-Comté, France Samuel Thibault, LaBRI, Université Bordeaux, France Ryan Friese, Pacific Northwest National Laboratory, USA Devesh Tiwari, Northeastern University, USA Mohsen Amini Salehi, University of Louisiana Lafayette, USA

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WoC 2018 (second CFP)- IEEE 4th International Workshop on Container Technologies and Container Clouds
by Parisa Heidari 30 Dec '17

30 Dec '17

[Our sincere apologies if you receive multiple copies of this email] ============== CALL FOR PAPERS --** WOC 2018 **-- **IEEE 4th International Workshop on Container Technologies and Container Clouds** https://sites.google.com/view/woc18/home April 17-20, 2018 Orlando, Florida, USA Held in conjunction with IEEE International Conference on Cloud Engineering (IC2E) 2018 [http://conferences.computer.org/IC2E/2018/index.htm] ---------------------------------------------------------------------------- IMPORTANT DATES: Submission Deadline: Jan 10, 2018 Author Notification: Jan 30, 2018 Camera-ready Deadline: Feb 5, 2018 Workshop date (TBD): April 17-20, 2018 ----------------------------------------------------------------------------- Containers are a lightweight OS-level virtualization abstraction primarily based on namespace isolation and control groups. In the recent years, container-based virtualization for applications has gained immense popularity thanks to the success of technologies like Docker. Container packaging mechanisms like Docker, LXD and Rkt, as well as management frameworks like Kubernetes, Mesos, etc., are witnessing widespread adoption in the industry today. Container technologies have eliminated the feature parity between development and production environment by enabling developers to package applications and their dependencies as a single unit that can be run across diverse operating environments. Though containers provide a great amount of flexibility and portability from a developer's perspective, there are several important challenges that need to be addressed by the infrastructure provider, in order to run these virtualized applications in a cloud environment. The fourth workshop on container technologies and container clouds solicits contributions in this area from researchers and practitioners in both the academia and industry. The workshop welcomes submissions describing unpublished research, position papers as well as deployment experiences on various topics related to containers as outlined below: Topics of interested include but are not limited to: --Security, isolation and performance of containers --Network architectures for multi-host container deployments --Orchestration models for cloud scale deployments --High availability systems for containerized workloads --Leveraging hardware support for containers and containerized workloads --Migrating and optimizing traditional workloads for containers --Operational issues surrounding management of large clusters of containers --Container use cases and challenges for HPC, Big Data and IoT applications --Leveraging cognitive techniques for containers --Performance enhancement of containers --Use cases of using containers such as serverless computing and PaaS --Comparative studies between containers, uni-kernels, and any other virtualization technologies --Other topics relevant to containers __Submissions: Submissions are single blind and should follow the IEEE conference guidelines for formatting. They can be in one of the two formats: a traditional 5 page paper (excluding references) or a 2 page extended abstract/proposal for operational experiences and position pieces. The category of submission (paper or extended abstract) should be mentioned in the title. Please upload your papers in PDF form to easychair [https://easychair.org/conferences/?conf=woc18] Submissions will be judged on novelty, relevance, clarity of presentation, and correctness. Authors of accepted submissions are required to present their work. Accepted papers and abstracts will be made available in the conference website at least one week before the workshop, so that the participants can come prepared having read the papers. *Accepted submissions will be published via IEEExplore.* ----------------------------------------------------------------------- ORGANIZING COMMITTEE __ Workshop chair: * Seetharami R. Seelam – IBM T. J. Watson Research Center * Ali Kanso – IBM T. J. Watson Research Center __ Publicity Chair: * Parisa Heidari – Ericsson, Canada __ Program Committee: * Michela Taufer, University of Deleware * Gregor von Laszewski, Indian University * Olivier Sallou, INRIA * Wei Tang, Google Inc. * Ming Zhao, Arizona State University * Abhishek Gupta, Intel * Abdelouahed Gherbi, ETS University, Montreal, Canada * Wubin Li, Ericsson Research, Montreal, Canada * Timothy Wood, George Washington University * Shriram Rajagopalan, IBM T. * Marco Cello, Nokia Bell Labs * Wei Tan, Citaldel * Vatche Ishakian, Bentley University

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[IEEE DASC'18] Call for Papers, 12-15 August 2018, Athens, Greece [The place for Exploring Great Islands]
by Anna Kobusińska 29 Dec '17

29 Dec '17

==============CALL FOR PAPERS================= The 16th IEEE International Conference on Dependable, Autonomic and Secure Computing (DASC 2018) 12-15 August 2018, Athens, Greece http://cyber-science.org/2018/dasc/ ============================================== ----------------------- INTRODUCTION ----------------------- IEEE DASC 2018 will be held in August 12-15, 2018 in Athens, Greece, co-located with IEEE CyberSciTech 2018, IEEE DataCom 2018 and IEEE PiCom 2018 (the event location is very close to the Parliament of Greece). IEEE DASC 2018 aims to bring together computer scientists, industrial engineers, and researchers to discuss and exchange experimental and theoretical results, novel designs, work-in-progress, experience, case studies, and trend-setting ideas in the areas of dependability, security, trust and/or autonomic computing systems. Topics of particular interests include the following tracks, but are not limited to: ------------------------------- SCOPE AND INTERESTS -------------------------------- - Dependable, Autonomic, Secure Computing Systems, Architectures and Communications - Cloud Computing and Fog/edge Computing with Autonomic and Trusted Environment - Dependable Automatic Control Techniques and Systems - Dependable Sensors, Devices, Embedded Systems - Dependable Electronic-Mechanical Systems, Optic-Electronic Systems - Self-improvement in Dependable Systems - Self-healing, Self-protection and Fault-tolerant Systems - Hardware and Software Reliability, Verification and Testing - Software Engineering for Dependable Systems - Safety-critical Systems in Transportation and Power System - Security Models and Quantifications - Trusted P2P, Web Service, SoA, SaaS, EaaS, and PaaS - Self-protection and Intrusion-detection in Security - DRM, Watermarking Technology, IP Protection - Context-aware Access Control - Virus Detections and Anti-Virus Techniques/Software - Cyber Attack, Crime and Cyber War - Human Interaction with Trusted and Autonomic Computing Systems - Security, Dependability and Autonomic Issues in Ubiquitous Computing - Security, Dependability and Autonomic Issues in Cyber-Physical System - Security, Dependability and Autonomic Issues in Big Data, SDN, and IoT Systems - QoS in Communications and Services and Service Oriented Architectures - Information and System Security - Reliable Computing and Trusted Computing - Wireless Emergency and Security Systems - Information Technology in Biomedicine - Multimedia Security Issues over Mobile and Wireless Networks - Multimedia in Mobile Computing: Issues, System Design and Performance Evaluation - Software Architectures and Design for Emerging Systems - Software Engineering for Emerging Networks, Systems, and Mobile Systems - Evaluation Platforms for Dependable, Autonomic and Secure Computing Systems - Trustworthy Data, Secured Data Collection System, Model, and Architectures --------------------- IMPORTANT DATES --------------------- Workshop/Special Session Proposal Due: Feb. 10, 2018 Paper Submission Due: Mar. 30, 2018 Demo/Poster/WiP Submission Due:April 30, 2018 Author Notification: May 20, 2018 Camera-ready Paper Due:June 15, 2018 --------------------------------------------------------- SUBMISSION AND PUBLICATION INFORMATION --------------------------------------------------------- Authors are invited to submit their original research work using IEEE CS Proceedings format via DASC 2018 website: http://cyber-science.org/2018/dasc/sub/. Research paper (8 pages) should explore a specific technology problem and propose a complete solution to it, with experimental results. Work-in Progress (WiP) Papers (5~6 pages) and Demo/Poster papers (2~4 pages) must describe working systems within the scope of DASC. Workshop & Special Session papers (6 pages) need to be submitted to corresponding workshops & special sessions. * Accepted papers will be included into the proceedings published by IEEE Computer Society Press (EI indexed). * At least one of the authors of any accepted paper is required to register and present the paper at the conference. * Extended versions of selected papers will be considered for fast-track publication in some prestige journals (SCI/EI indexed). * Best Paper Awards will be given for the best papers in DASC 2018. -------------------------------- Organizing Committees -------------------------------- General Chairs Md Zakirul Alam Bhuiyan, Fordham University, USA Stefanos Gritzalis, University of the Aegean, Greece General Executive Chairs Klimis Ntalianis, Athens U of Applied Sciences, Greece Paulo Pires, Federal University of Rio de Janeiro, Brazil Program Chair Anna Kobusinska, Poznan University of Technology, Poland Program Co-Chairs Naohiro Hayashibara, Kyoto Sangyo University, Japan Kambourakis Georgios, University of the Aegean, Greece Tian Wang, Huaqiao University, China Workshop/ Special Session Chairs Konsts Lambrinoudakis, University of Piraeus, Greece Al-Sakib Khan Pathan, Southeast University, Bangladesh Tatsuhiro Tsuchiya, Osaka University, Japan Demo/Poster/WiP Chairs Taufiq Asyhari, Cranfield University, UK Rukhsana Afroz Ruby, SIAT, China Publicity Chairs Wenjia Li, New York Institute of Technology, USA Constantinos Patsakis, University of Piraeus, Greece Kenichi Kourai, Kyushu Institute of Technology, Japan Md. Arafatur Rahman, Univ Malaysia Pahang, Malaysia Shaikh M Arifuzzaman, University of New Orleans, USA Local Organizing Chair Nikolaos Mastorakis, Hellenic Naval Academy, Greece Honorary Chair: Alberto Del Bimbo, University of Firenze, Italy Advisory Committee Chairs Nobuyasu Kanekawa, Hitachi, Ltd., Japan Mohammed Atiquzzaman, University of Oklahoma, USA Yi Pan, Georgia State University, USA Steering Committee Jianhua Ma (Chair), Hosei University, Japan Laurence T. Yang (Chair), SFX University, Canada Tadashi Dohi, Hiroshima University, Japan Yuanshun Dai, Univ. of Electronic Sci. & Tech. of China Stephen S. Yau, Arizona State University, USA Please visit the DASC 2018 Website http://cyber-science.org/2018/dasc/ for the complete listing of organizing committee and TPC members.

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Call for paper-5th International Conference on Artificial Intelligence and Applications (AIAPP 2018)
by Leo Martinez 29 Dec '17

29 Dec '17

5th International Conference on Artificial Intelligence and Applications (AIAPP 2018) February 24~25, 2018, Dubai, UAE http://cosit2018.org/aiapp/index.html Scope & Topics 5th International Conference on Artificial Intelligence and Applications (AIAPP 2018) is a forum for presenting new advances and research results in the fields of Artificial Intelligence. The conference will bring together leading researchers, engineers and scientists in the domain of interest from around the world. The scope of the conference covers all theoretical and practical aspects of the Artificial Intelligence. forum for presenting new advances and research results in the fields of Artificial Intelligence Authors are solicited to contribute to the conference by submitting articles that illustrate research results, projects, surveying works and industrial experiences. Topics of interest include, but are not limited to, the following: - AI Algorithms - Artificial Intelligence Tools & Applications - Automatic Control - Bioinformatics - Natural Language Processing - CAD Design & Testing - Computer Vision and Speech Understanding - Data Mining and Machine Learning Tools - Fuzzy Logic - Heuristic and AI Planning Strategies and Tools - Computational Theories of Learning - Hybrid Intelligent Systems - Information Retrieval - Intelligent System Architectures - Knowledge Representation - Knowledge-based Systems - Mechatronics - Multimedia & Cognitive Informatics - Neural Networks - Parallel Processing - Pattern Recognition - Pervasive Computing and Ambient Intelligence - Programming Languages - Reasoning and Evolution - Recent Trends and Developments - Robotics - Semantic Web Techniques and Technologies - Soft Computing Theory and Applications - Software and Hardware Architectures - Web Intelligence Applications and Search Paper Submission Authors are invited to submit papers through the conference Submission system by December 31, 2017.Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this conference. The proceedings of the conference will be published by Computer Science Conference Proceedings in Computer Science & Information Technology (CS & IT) series (Confirmed). Selected Papers from AIAPP 2018, after further revisions, will be published in the special issue of the following journals. - International journal of Artificial Intelligence & Applications (IJAIA) - International Journal of Fuzzy Logic Systems (IJFLS) - International Journal on Soft Computing, Artificial Intelligence and Applications (IJSCAI) - Machine Learning and Applications: An International Journal (MLAIJ) - International Journal on Soft Computing ( IJSC ) - Information Technology in Industry (ITII)New- ESCI(WOS) Indexed Important Dates - Submission Deadline : December 31, 2017 - Authors Notification : January 20, 2018 - Registration &Camera-Ready Paper Due : January 28, 2018

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CFP: ASPLOS 2018 Workshop-SDDCS 2018
by Yu Hua 28 Dec '17

28 Dec '17

4th Software-Defined Data Computing and Storage workshop (SDDCS) co-located with ACM ASPLOS 2018 on March 25, 2018 in Williamsburg, VA, USA https://sddcs.github.io/2018/sddcs2018.html Overview The future infrastructures of data centers and cloud computing are becoming increasingly software-defined. Although the infrastructures consist of tightly connected computing, networking, and storage resources, these resources are generally studied independently. For example, studies focused on computing/network often overlook the properties of storage devices, and vice versa. Overall infrastructure performance often decreases due to miscommunication and misconfiguration of different resources. Software-defined methodologies offer an opportunity to bridge the gap and deliver high performance. But making an infrastructure "software defined" takes cross community efforts. The SDDCS workshop provides the forum for multi-disciplinary research spanning computing architecture, networking, storage systems and devices, as well as applications. SDDCS aims to bring together industry and academia to jointly explore recent progresses related to the potential performance bottleneck and the gap between computing and storage in the software-defined context. We particularly encourage contributions containing highly novel ideas, new approaches, and/or groundbreaking results. Topics Topics of interest in SDDCS include but are not limited to: Software-defined memory system for cloud computing Software-defined non-volatile devices Convergent design for computing and storage Non-volatile storage support for network transmission Storage deduplication for remote cloud backups Data collection and analytics for system optimization Dynamic workload redistribution and scheduling Processing-in-memory Near-data-computing Non-volatile devices in network switches Cross-layer coordination in data centers Storage virtualization Security for SDDCS schemes Programmable interfaces for convergent design User studies and experiences of real-world applications (e.g., graph processing, deep learning, database, etc) Submission Instructions Submitted papers must be no longer than 8 single-spaced 8.5" x 11" pages, including figures, tables, and references; two-column format, using 10-point type on 12-point (single-spaced) leading; and a text block 6.5" wide x 9" deep. Author names and affiliations should appear on the title page.The submitted papers should present original theoretical and/or experimental research in any of the areas listed above that has not been previously published, accepted for publication, or is not currently under review by another conference or journal. The accepted papers will be published in ACM International Conference Proceeding Series (pending). Selected and extended papers will be further recommended to ACM Transactions on Storage (TOS) for fast-track processing (no guarantee of acceptance). Important Dates: Paper submission due: January 25, 2018, 11:59pm AoE Notification to authors: February 20, 2018 Final paper files due: March 10, 2018, 11:59pm AoE Workshop Organizer General Co-chairs: Evgenia Smirni, College of William and Mary Yu Hua, Huazhong University of Science and Technology Program Co-chairs: Bo Wu, Colorado School of Mines Vasily Tarasov, IBM Research Publication Chair: Xing Lin, NetApp Publicity Chair: George Amvrosiadis, Carnegie Mellon University Web Chair: Pengfei Zuo, Huazhong University of Science and Technology Program Committee Member: Vaneet Aggarwal, Purdue University Bharath Balasubramanian, AT&T Labs Research Feng Chen, Louisiana State University Chris Gniady, University of Arizona Song Jiang, University of Texas, Arlington Mahmut Kandemir, Pennsylvania State University Scott Klasky, Oak Ridge National Laboratory Jay Lofstead, Sandia National Laboratories Darrell D. E. Long, University of California, Santa Cruz Ao Ma, University of Wisconsin-Madison Rajesh Panta, AT&T Labs Research Marco Paolieri, University of Southern California Lukas Rupprecht, IBM Research - Almaden Philip Shilane, Dell EMC Emina Soljanin, Rutgers University Alan Sussman, University of Maryland Ravi Tandon, University of Arizona Peter Varman, Rice University Youjip Won, Hanyang University Yuan Xie, University of California, Santa Barbara Ming Zhao, Arizona State University

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[EXTENDED DEADLINE] WP3 Second Workshop on Pioneering Processor Paradigms in conjunction with HPCA'18
by Ramon Bertran 28 Dec '17

28 Dec '17

===================================================== Call for Contributions - WP3 - 2018 SECOND WORKSHOP ON PIONEERING PROCESSOR PARADIGMS (WP3) in conjunction with the 24th IEEE Symposium on High Performance Computer Architecture (HPCA'18) 25 February, 2018 / Vienna, Austria http://wp3workshop.website/ ===================================================== Innovations in instruction set architecture (ISA), processor microarchitecture and supportive advances in circuit design, compilers, semiconductor technology, pre-silicon specification, modeling and validation have all been essential elements of the computer systems revolution that has transformed human society so dramatically over the last six decades or more. In the late CMOS era, with power and reliability walls already causing major paradigm shifts, the need for new innovations in cross-layer, hardware-software design and modeling are being called for to help keep the IT industry moving and growing at historical rates. In trying to forge a path of innovation, it is sometimes worth examining the past to look for major paradigm shifts in (micro)-architecture, circuits, modeling and software that helped us keep going in the face of past technology-driven disruption points. With this in mind, we present the second edition of the workshop on pioneering processor paradigms (P3). With the help of truepioneers as well as budding new researchers, P3 will take a retrospective look at how past technological hurdles were circumvented through major i nnovations. The goal is to learn from the past in devising new solution strategies for the future. The P3 workshop will offer a number of invited talks from true pioneers as well as reviewed selections from the new generation of researchers and teachers who are eager to take a retrospective look into surveying past pioneering work that can teach us a lesson about solution strategies of the future. *** Important Dates: - Submission deadline: January 12nd, 2018 - Notification of acceptance: January 14th, 2018 - Final paper submission: February 11st, 2018 - Workshop date: February 25th, 2018 ** Call for contributions The workshop on pioneering processor paradigms invites survey (or tutorial)-like submissions for review. The ideal paper would highlight a single pioneering paper (or set of papers) constituting a major processing, design, modeling or software paradigm shift in the past. In addition to explaining the context and basic concepts articulated in such work, the author(s) should draw relevant conclusions about how this pioneering work could or should influence computing paradigms of the future. Note: Ph.D dissertation research topic proposals from (junior graduate students) that contain a survey of a key paper or two to build up the motivational justification of the proposal are quite welcome, for example. ** Topics of interest Example topic areas include (but are not limited to): - Processing and cache taxonomy papers. - RISC architectures and CISC-to-RISC dynamic translation support. - Processor pipelining, super scalar processing and branch prediction innovations. - Register renaming, out-of-order execution and precise interruption. - Cycle-accurate processor performance modeling. - Innovations in floating point arithmetic units and vector/SIMD acceleration. - VLIW architectures. - Multi-threading, multiscalar and speculative multi-threading. - Homogeneous and heterogeneous multi-core processors; accelerator-enabled efficiency boost. - Power, temperature, and reliability-aware computing – with associated modeling innovations. - Compiler innovations in support of novel microarchitectural paradigms. - Circuit design innovations in support of (micro)-architectural paradigm shifts. *** Registration Refer to main conference: http://hpca2018.ece.ucsb.edu/# *** Hotel Reservation Refer to main conference: http://hpca2018.ece.ucsb.edu/# For more details, please see http://wp3workshop.website/ ====================================================

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CALL for PAPERS -- 14th Workshop on Dependability and Fault Tolerance (VERFE'18) in conjunction with 31st ARCS 2018, Braunschweig, Germany, April 9th - 12th, 2018
by Bernhard Fechner 28 Dec '17

28 Dec '17

*** Please excuse multiple postings *** GI/ITG/GMA Technical Committee "Dependability and Fault Tolerance" (VERFE) # Call for Papers #14th Workshop on Dependability and Fault Tolerance (VERFE'18) in conjunction with 31st ARCS 2018, Braunschweig, Germany, April 9th - 12th, 2018 ### Background and Focus -------------------- Although the basic reliability of hardware and software components has improved over decades, their increasing number causes severe problems. Moreover, in recent years it can be observed that in an increasing number of devices, e.g. cars, digital components are integrated into environments of other physical components. Here, the complexity and number of interactions with these components creates problems with regard to maintaining a dependable operation of the entire system in case of faults or external disturbances. While this is not a problem with microprocessors there, shrinking feature sizes, higher complexity, lower voltages, and higher clock frequencies increase the probability of design-, manufacturing-, and operational faults, making fault tolerance techniques in general purpose processors to be of crucial importance in the future. As simple solutions (such as TMR) easily can get too expensive, the ability to trade increased reliability against performance/power overhead will become important, resulting in light-weight fault tolerance techniques implemented in hardware, but controllable from higher software layers. This workshop aims at presenting contributions and work-in-progress from the research area of dependable and fault tolerant computing in order to bring together scientists working in related fields. ### Topics -------------------- Contributions on the topic of "Dependable Embedded Systems" are of particular interest; contributions on general topics of dependability and fault tolerance are also welcome but not limited to: * reliability models for hardware and software * modeling and simulation of fault-tolerant systems * fault-tolerant systems and system components * formal verification of systems * testing of hardware and software * fault treatment| * detection and correction of transient faults * quantitative assessment of reliability improvements * safety-critical applications * timeliness problems * dependability of networks * dependability of embedded systems * highly available systems * dependable organic computing * self-organization within redundant systems * dependable ubiquitous and pervasive computing * composability of dependable systems * dependable mechatronic systems / micro systems * dependability of mobile and wireless systems * robustness and robustness metrics * validation and verification * fault models and fault model abstraction * fault-injection techniques * software-controlled fault tolerance * on-chip backward recovery techniques * forward recovery techniques (notification of higher layers) * fault-tolerant caches * dynamic re-use of currently unused resources in processors for fault-tolerance ### Information for Authors Accepted papers (>= 3 reviews) will be published by VDE and IEEExplore and will appear in ARCS Workshop Proceedings. ********** Selected papers will appear in the FERS Journal (ISSN 0724-5319) ************ The workshop will focus on research presentations as well as brainstorming sessions. Therefore, two kinds of contributions are welcome: * research papers documenting results of scientific investigations and * position papers proposing strategies or discussing open problems. ### Deadlines: * Submission: January 15, 2018 (extended abstracts (3-4 pages) or full papers, PDF) to: bernhard.fechner(a)fernuni-hagen.de * Notification: January 31, 2018 * Camera-ready: February 9, 2018 (max. 13 pages); VERFE'18 Workshop site: http://arcs2018.itec.kit.edu/download/VERFE2018.pdf. Further information about ARCS 2018: http://arcs2018.itec.kit.edu/ ### Workshop Chairs | Name | Institute |Country| |-------------------|-----------------------------------|-------| | B. Fechner | Univ. of Hagen | DE | | K.-E. Großpietsch | St. Augustin | DE | ### Program Committee (TBC) | Name | Institute |Country| |-------------------|-----------------------------------|-------| | L. Bauer | Karlsruhe Inst. of Technology | DE | | F. Belli | Univ. of Paderborn | DE | | R. Buchty | Karlsruhe Inst. of Technology | DE | | K. Echtle | Univ. of Duisburg-Essen | DE | | W. Ehrenberger | Univ. of Fulda | DE | | R. Ernst | TU Braunschweig | DE | | B. Fechner | Univ. of Hagen | DE | | M. Gössel | Univ. of Potsdam | DE | | K.-E. Großpietsch | St. Augustin | DE | | J. Henkel | Karlsruhe Inst. of Technology | DE | | J. Hursey | Oak Ridge National Lab. | US | | J. Keller | Univ. Hagen | DE | | H.-D. Kochs | Univ. of Duisburg-Essen | DE | | M. Lê | KUKA Augsburg | DE | | M. Malek | Univ. of Lugano | CH | | E. Maehle | Univ. of Lübeck | DE | | M. Mock | Fraunhofer St. Augustin | DE | | E. Nett | Univ. of Magdeburg | DE | | D. Nikolos | Univ. of Patras | DE | | F. Saglietti | Univ. of Erlangen-Nuremberg | DE | | T. Sato | Univ. of Fukuoka | JP | | M. Schulz | Lawrence Livermore National Lab. | US | | M. Shafique | Univ., of Vienna | AT | | P. Sobe | HTW Dresden | DE | | J. Sosnowski | Univ. of Warsaw | PL | | A. Stopp | Daimler AG Berlin | DE | | C. Trinitis | TU Munich | DE | | P. Tröger | TU Chemnitz | DE | | T. Vierhaus | TU Cottbus | DE | | M. Walter | Siemens AG Nuremberg | DE | | H. Wedde | TU Dortmund | DE | | N. Wehn | TU Kaiserslautern | DE | | J. Weidendorfer | TU Munich | DE | | T. Yoneda | Univ. of Tokyo | JP | | S. Zug | Univ. of Magdeburg | DE |

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GPU Hackathon Call, 5-9 March 2018 Dresden Germany
by Matthias Werner 27 Dec '17

27 Dec '17

*Project Submission Deadline* 14 January 2018 *Project Submission* https://www.olcf.ornl.gov/training-event/2018-gpu-hackathons/ Hackathon admission fee: *free of charge* *Location* Dresden, Germany (details will be announced) *Contact* gcoe(a)mailbox.tu-dresden.de *GPU Hackathon* The goal of each hackathon is for current or prospective user groups of large hybrid CPU-GPU systems to send teams of at least 3 developers along with either - a (potentially) scalable application that could benefit from GPU accelerators, or - an application running on accelerators that need optimization. There will be intensive mentoring during this 5-day hands-on workshop, with the goal that the teams leave with applications running on GPUs, or at least with a clear roadmap of how to get there. Our mentors come from national laboratories, universities, and vendors, and besides having extensive experience in programming GPUs, many of them develop the GPU-capable compilers and help define standards such as OpenACC and OpenMP. Programming experience with OpenACC or CUDA is not a requirement. You will learn quickly in the intense 5-day schedule, working on your code 95% of the time with the mentors. In the weeks preceding the hackathon, you will have a chance to attend training to prepare you for the event. Prior GPU experience is not required! Participation in the training event is free of charge. The meeting room and lunches, as well as access to the supercomputers throughout the event are offered by participating sites. Mentors and learning materials introduced by the instructors are sponsored by participating sites and the following partner organizations: Helmholtz-Zentrum Dresden-Rossendorf (HZDR), TU Dresden, RWTH Aachen, FZ Juelich, U Goettingen, Scionics, as well as our sponsors NVIDIA and Atos/Bull. Guido Juckeland, HZDR & Dirk Pleiter, FZJ.

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ICDCS 2018 Call for Workshops
by Qin, Feng 27 Dec '17

27 Dec '17

The 38th IEEE International Conference on Distributed Computing Systems (ICDCS 2018, http://icdcs2018.ocg.at/) solicits Workshop proposals. Workshops provide opportunities for focused discussion on selected topics related to Distributed Computing Systems in a group setting. A workshop proposal submission consists of a descriptive proposal that is not more than 3 pages in length and contains the following information: * Title of the workshop * A brief technical description of the workshop, identification of specific technical issues, focus, and justification of its timeliness * A brief description of the review process * Names and contact information of the organizer * The names, postal addresses, phone numbers and e-mail addresses of the proposed workshop organizing committee. This committee should consist of at least two persons knowledgeable in the technical issues to be addressed by the workshop * Primary contact of the organizing committee * Estimated number of participants, length, and timetable of the workshop * Resources required, such as one day or half day workshop, expected number of attendees (room size), whether a panel setup is needed, etc. * A tentative call for papers with important dates (submission of papers, notifications etc.) * Information about the previous edition of the workshop (if any) including: * History and frequency of the workshop * Previous conference co-locations * URLs, if available * Approximate attendance Acceptance will be based on an evaluation of the workshop’s potential for generating useful results, the timeliness of and the expected interest in the topic, and the proposers’ ability to lead a successful workshop. Organizers are expected to perform any additional advertising in related communities outside the main ICDCS community, to create and maintain the workshop website, arrange for the collection and refereeing of submissions, and to co-ordinate the collection and delivery of camera ready material and IEEE copyright transfers. Workshops Program Chair Feng Qin, The Ohio State University Workshop Proposal Submission Please submit the workshop proposals as a PDF attachment to Prof. Feng Qin: qin.34 [AT] osu.edu via email. Important Dates * Workshop Proposal Submission: January 03, 2018 * Workshop Proposal Notification: January 09, 2018 * Workshop Website linked from ICDCS 2018 home: January 16, 2018

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CISTI'2018 - Doctoral Symposium
by ML 27 Dec '17

27 Dec '17

* Proceedings published in IEEE Xplore and indexed by ISI, Scopus, etc. --------------------------------------------------------------------------------------------------------------------------- Doctoral Symposium of CISTI'2018 - 13th Iberian Conference on Information Systems and Technologies Caceres, Spain, 16 - 13 June 2018 http://www.cisti.eu/ <http://www.cisti.eu/> ------------------------------------------------------------------------------------------------------------------------------------ The purpose of CISTI'2018’s Doctoral Symposium is to provide graduate students a setting where they can, informally, expose and discuss their work, collecting valuable expert opinions and sharing new ideas, methods and applications. The Doctoral Symposium is an excellent opportunity for PhD students to present and discuss their work in a Workshop format. Each presentation will be evaluated by a panel composed by at least three Information Systems and Technologies experts. Contributions Submission The Doctoral Symposium is opened to PhD students whose research area includes the themes proposed for this Conference. Submissions must include an extended abstract (maximum 4 pages), following the Conference style guide <http://cisti.eu/2017/images/templates.zip>. All selected contributions will be handed out along with the Conference Proceedings, in CD with an ISBN. These contributions will be available in the IEEE Xplore <http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=7511893> Digital Library and will be sent for indexing in ISI, Scopus, EI-Compendex, INSPEC and Google Scholar. Submissions must include the field, the PhD institution and the number of months devoted to the development of the work. Additionally, they should include in a clear and succinct manner: • The problem approached and its significance or relevance • The research objectives and related investigation topics • A brief display of what is already known • A proposed solution methodology for the problem • Expected results Important Dates Paper submission: February 4, 2018 Notification of acceptance: March 18, 2018 Submission of accepted papers: March 30, 2018 Payment of registration, to ensure the inclusion of an accepted paper in the conference proceedings: April 1, 2018 Organizing Committee Álvaro Rocha, Universidade de Coimbra Manuel Pérez Cota, Universidad de Vigo Scientific Committee Manuel Pérez Cota, Universidad de Vigo (Chair) Adolfo Lozano Tello, Universidad de Extremadura Álvaro Rocha, Universidade de Coimbra Ana Amélia Carvalho, Universidade de Coimbra Ana Maria Ramalho Correia, Nova Information Management School Antonio Garcia Loureiro, Universidad de Santiago de Compostela António Lucas Soares, Universidade do Porto, FEUP Arnaldo Martins, Universidade de Aveiro Bráulio Alturas, Instituto Universitário de Lisboa (ISCTE-IUL) Carlos Ferrás Sexto, Universidad de Santiago de Compostela David Fonseca, La Salle, Universitat Ramon Llull Ernest Redondo, Universidad Politécnica de Catalunya Francisco Restivo, Universidade Católica Portuguesa Gonçalo Paiva Dias, Universidade de Aveiro Gonzalo Cuevas Agustin, Universidad Politécnica de Madrid João Paulo Costa, Universidade de Coimbra José Borbinha, INESC-ID, IST, Universidade de Lisboa José Valença, Universidade do Minho Jose Antonio Calvo-Manzano Villalón, Universidad Politécnica de Madrid Juan Hernádez, Universidad de Extremadura Luis Camarinha-Matos, Universidade Nova de Lisboa Luís Paulo Reis, Universidade do Minho Marco Painho, Nova Information Management School Mário Piattini, Universidad de Castilla-La Mancha Nelson Pacheco Rocha, Universidade de Aveiro Ramiro Gonçalves, Universidade de Trás-os-Montes e Alto Douro Webpage of the Doctoral Symposium: http://cisti.eu/index.php?option=com_content&view=article&id=35&Itemid=119&… Kind regards, CISTI'2018 Team http://www.cisti.eu/ --- This email has been checked for viruses by AVG. http://www.avg.com

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