April 2017 - hpc-announce - mailman3.cels.anl.gov

Call for Papers: 8th International Green and Sustainable Computing Conference (IGSC’17)
by Ishan Thakkar 30 Apr '17

30 Apr '17

CALL FOR PAPERS: THE Eighth International Green and Sustainable Computing Conference (IGSC’17) ================================================================================================ www.green-conf.org October 23-25 2017, Orlando, Florida IGSC’17 will provide a forum for presenting and discussing innovative research on a broad range of topics in the fields of sustainable and energy-efficient computing and computing for a more sustainable planet. The conference will consist of technical papers, panels, workshops, PhD Forum, and tutorials on these topics. IGSC’17 will be technically co-sponsored by the IEEE. Topics of interest include, but are not limited to: Green Computing ----------------- - Power- and thermal-aware algorithms, software and hardware - Low-power electronics and systems - Power-efficient multi/many-core chip design - Application-specific ASICs and FPGAs - Sensing and monitoring - Power and thermal behavior and control - Data centers optimization - Smart grid and microgrids - Power-efficient delivery and cooling - Reliability, life-cycle analysis of IT equipment Computing for Sustainability ----------------------------- - Renewable energy models and prediction - Matching energy supply and demand - Smart transportation and electric vehicles - Smart buildings and urban computing - Energy harvesting, storage, and recycling - Climate and ecosystem monitoring - IT solutions for water quality, air pollution, and sustainable agriculture - Computational models for epidemics, infectious diseases, and human well-being - Computational methods for sustainable economy and society Paper submission guidelines ---------------------------------- IGSC’17 welcomes submissions that have not been published and that are not under review by other conferences or journals. All submissions will be evaluated on their originality, technical soundness, significance, presentation, and interest to the conference attendees. Please refer to the IGSC website (www.green-conf.org) for specific instructions related to paper submission. Best paper award and journal publication ------------------------------------------ The Technical Committee will select the best contributions to be extended and considered by the Elsevier Journal on Sustainable Computing. Workshops and special sessions --------------------------------- Proposals are solicited for workshops and special sessions to be held in conjunction with the conference. Proposals should be submitted to the Workshops and Special Sessions Chair (iahmad(a)cse.uta.edu) Ph.D. forum ------------ Submissions are solicited for a Ph.D. forum, from doctoral students engaged in research on sustainable and energy-efficient computing. Please refer to the IGSC website for specific instructions for extended abstract submission. Important dates ----------------- Deadline for submitting Workshop and Special Session proposals: May 15, 2017 Deadline for submitting Ph.D. forum extended abstracts: June 16, 2017 Paper submission: June 16, 2017 Notifications sent to authors: July 17, 2017 Camera-ready papers due: Aug 5, 2017 Organization -------------- Steering Committee Chairs: Ishfaq Ahmad (University of Texas, Arlington, USA), iahmad(a)cse.uta.edu Behrooz Shirazi (Washington State University, USA), shirazi(a)wsu.edu General Chair: Weisong Shi (Wayne State University, USA), weisong(a)wayne.edu Tech. Program Chair: Sudeep Pasricha (Colorado State University, USA), sudeep(a)colostate.edu Workshop Chair: Ishfaq Ahmad (University of Texas, Arlington, USA), iahmad(a)cse.uta.edu PhD Forum Chair: Mahdi Nikdast (Polytechnique Montréal, Canada), mahdi.nikdast(a)polymtl.ca Publicity Chair: Ishan Thakkar (Colorado State University, USA), ishan9it(a)rams.colostate.edu

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[CFP] SECOND INTERNATIONAL WORKSHOP ON ENHANCING PARALLEL SCIENTIFIC APPLICATIONS WITH ACCELERATED HPC (ESAA 2017)
by FRANCISCO JAVIER GARCIA BLAS 30 Apr '17

30 Apr '17

SECOND INTERNATIONAL WORKSHOP ON ENHANCING PARALLEL SCIENTIFIC APPLICATIONS WITH ACCELERATED HPC (ESAA 2017) to be held as part of EuroMPI/USA 2017 Chicago, USA, September 25-28, 2017 ____________________________________________________________ _________________ BACKGROUND Since 2011, the most powerful supercomputers systems ranked in the Top500 list are hybrid systems composed of thousands of nodes that includes CPUs and accelerators, as Xeon Phi and GPUs. Programming and deploying applications on those systems is still a challenging work, due to the complexity of the system and the need to mix several programming interfaces (MPI, CUDA, Intel Xeon Phi) in the same application. This Workshop is aimed to explore the state of the art of developing applications in accelerated massive HPC architectures, including practical issues of hybrid usage models with MPI, OpenMP, and other accelerators programming models. The idea is to publish novel work on the use of available programming interfaces (MPI, CUDA, Intel Xeon Phi) and tools for code development, application performance optimizations, application deployment on accelerated systems, as well as the advantages and limitations of accelerated HPC systems. Experiences with real-world applications, including scientific computing, numerical simulations, healthcare, energy, data-analysis, etc. are also encouraged. TOPICS Areas of interest of the workshop include, but are not limited to: Tools, libraries, and environments for accelerators. Hybrid and heterogeneous programming with MPI and accelerators. Performance evaluation scientific applications based on accelerators. Automatic performance tuning of scientific applications with accelerators. Integrating accelerators on existing HPC middlewares. Run-times for accelerators. Energy efficient HPC solutions based on accelerators. Storage cache solutions based on SSD accelerators. Parallel data analysis for MPI and SSD. Real-world scientific and engineering applications using accelerated HPC. Future trends and prospects for accelerated HPC. SCHEDULE, IMPORTANT DATES Submission: May 30th, 2017 Author notification: June 26th, 2017 Camera Ready papers due: July 20th, 2017 Conference: September 25th-28th, 2017 COMMITTEE (preliminary) Workshop Organizers: Dr. Javier Garcia-Blas. University Carlos III of Madrid, Spain. Prof. Jesus Carretero. University Carlos III of Madrid, Spain. Program Committee: Ivona Brandic. Vienna University of Technology, Austria Minyi Guo, Shanghai Jiao Tong University, China Francisco Igual Peña, Universidad Complutense, Spain Florin Isaila, Argonne National Labs, Chicago, USA Emmanuel Jeannot, INRIA, France Hai Jin, Huazhong University of Science and Technology, China Timothy K. Jones, University of Cambridge, UK Laurent Lefevre, INRIA, Ecole Normale Superieure of Lyon, University of Lyon, France Diego R. Llanos, University of Valladolid,Spain Dimitar Lukarski, Uppsala University, Sweden Svetozar Margenov, Bulgarian Academy of Sciences, Bulgaria Raffaele Montella, University of Napoli Parthenope, Italy Ravi S Nanjundiah, Indian Institute of Science in Bangalore, India Ariel Olesiak, Poznan Supercomputing and Networking Center, Poland Antonio J. Peña, Argonne National Labs, Chicago, USA Enrique S. Quintana-Orti, Universidad Jaume I de Castellon, Spain Matei Ripeanu, University of British Columbia, Canada Leonel Sousa, Instituto Superior Tecnico, Universidade de Lisboa, Portugal Alexander Supalov, INTEL, USA Rupa K. Thulasiram, University of Manitoba, Canada Manuel Ujaldon, Universidad de Malaga, Spain Roman Wyrzykowski, Czestochowa University of Technology, Poland Julius Zilinskas, Vilnius University, Lithuani Xingshe Zhou, Northwestern Polytech University, China PAPER SUBMISSION GUIDELINES Contributors are invited to submit a full paper as a PDF document not exceeding 6 pages in English. The title page should contain an abstract of at most 100 words and five specific, topical keywords. The paper must be formatted according to double-column ACM ICPS proceedings style. The usage of LaTeX for preparation of the contribution as well as the submission in camera ready format is strongly recommended. Style files can be found at www.acm.org/publications/icps-instructions/. All contributions will be fully peer reviewed by the program committee. Registration for EuroMPI/USA 2017 main conference is mandatory to attend workshops. The paper submission online system is open: www.easychair.org/confer ences/?conf=esaa2017. -- ________________________________________________________ Dr. Javier García Blas Computer Architecture, Communications and Systems Area. Computer Science Department. UNIVERSIDAD CARLOS III DE MADRID Avda. de la Universidad, 30 28911 Leganés (Madrid), SPAIN e-mail: fjblas(a)inf.uc3m.es Phone:(+34) 916249143 FAX: (+34) 916249129 ________________________________________________________

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Deadline Extension: Auto-DaSP@Euro-Par 2017 -- Papers due to May 12
by Massimo Torquati 30 Apr '17

30 Apr '17

The submission deadline has been extended to May 12. Workshop web page: http://www.di.unipi.it/auto-dasp-17/ *^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ * *IMPORTANT*: Elsevier FGCS Special Issue available A selection of papers submitted to Auto-DaSP 2017 will be invited to the FGCS Special Issue on "New Landscapes of the Data Stream Processing in the Era of Fog Computing" Auto-DaSP 2017 CfP ^^^^^^^^^^^^ We are living in an ever-more connected world where everyday life environments are integrated with a proliferation of devices that continuously produce unbounded data flows that have to be processed "on the fly" in order to detect operational exceptions, deliver real-time alerts, and trigger automated actions. This paradigm extends to a wide spectrum of applications with high socio-economic impact, like systems for healthcare, emergency management, surveillance, intelligent transportation and many others. The data streaming domain belongs to the Big Data ecosystem. High-frequency data streams featuring time-varying characteristics represent one of the most challenging aspects in the design of applications and frameworks. This is especially critical in case of strict performance requirements (e.g., throughput and latency) that must be met despite an unexpected workload variability or the dynamism of the execution environment. High-performance solutions targeting today's commodity parallel hardware are "a must" to enable efficient data stream processing. This comprises run-time supports targeting multicores, GPU and FPGA co-processors, and large-scale distributed-memory systems like clusters, Clouds and recently Fog infrastructures. However, such solutions need autonomic logics in order to adapt the framework/applications to changing execution conditions and workloads. Examples are mechanisms and strategies to adapt the queries, the operators placement policies, intra-operator parallelism degree, scheduling strategies, load shedding rate and so forth. * Topics of interest include, but are not limited to, the following: - Parallel models for streaming applications - Stream processing in Cloud and Fog computing environments - Parallel continuous queries - Sliding-window queries - High-level parallel patterns - Autonomic solutions based on Control Theory and Artificial Intelligence methods - Strategies for operator and query placement - Stream processing on heterogeneous and reconfigurable hardware - Out-of-order data streams - Burstiness and workload variations - Stream scheduling strategies and load balancing - Adaptive load shedding - Integration of elasticity supports in existing frameworks - Use cases in various domains including Smart Cities, IoT, Finance, Social Media, and Healthcare * Submission Instructions Submissions in PDF format should not exceed 12 pages in the Springer LNCS style, which can be downloaded from the Springer Web site. The 12 pages limit is a hard limit. It includes everything (text, figures, references) and will be strictly enforced by the submission system. Complete LaTeX sources must be provided for accepted papers. All submitted research papers will be peer-reviewed. Only contributions that are not submitted elsewhere or currently under review will be considered. Accepted papers will be included in the workshop proceedings, published by Springer in the ARCoSS/LNCS series. Authors of accepted papers will have to sign a Springer copyright form. Papers have to be submitted through EasyChair at: https://easychair.org/conferences/?conf=europar2017workshops * Special Issue A number of selected papers presented at the workshop will be invited to the special issue titled "New Landscapes of the Data Stream Processing in the era of Fog Computing" that will appear on Future Generation Computer Systems (Elsevier FGCS). * Important Dates May 12, 2017 Paper submission deadline (extended!) June 16, 2017 Paper acceptance notifications October 3, 2017 Camera-ready due August 28-29, 2017 Workshop day * Workshop Co-Chairs - Valeria Cardellini, University of Rome Tor Vergata, Italy - Gabriele Mencagli, University of Pisa, Italy - Massimo Torquati, University of Pisa, Italy -- Computer Science Department University of Pisa, Italy Tel: +39 050 221 3169 Web: http://www.di.unipi.it/~torquati

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Deadline Extension: ROME@Euro-Par 2017 - Papers due May 12
by Lankes, Stefan 28 Apr '17

28 Apr '17

======================================================================= CALL FOR PAPERS The 5th Workshop on Runtime and Operating Systems for the Many-core Era (ROME 2017) August 28, 2017, Santiago de Compostela, Spain held in conjunction with Euro-Par 2017, August 28 - September 1, 2017 Santiago de Compostela, Spain http://www.rome.eonerc.rwth-aachen.de ======================================================================= Background ---------- Since the beginning of the multicore era, parallel processing has become prevalent across the board. However, in order to continue a performance increase according to Moore's Law, a next step needs to be taken: away from common multicores towards innovative many-core architectures. Such systems, equipped with a significant higher amount of cores per chip than multicores, pose challenges in both hardware and software design. On the hardware side, complex on-chip networks, scratchpads, hybrid memory cubes, non-volatile memory and stacked memory, as well as deep cache-hierarchies and novel cache-coherence strategies will enrich the current research areas in the future. However, the ROME workshop focuses on the software side because without complying system software, runtime and operating system support, all these new hardware facilities cannot be exploited. Hence, the new challenges in hardware/software co-design are to step beyond traditional approaches and to wage new programming models and operating system designs in order to exploit the theoretically available performance of future hardware as effectively and power-aware as possible. Topics ------ This year, too, authors from all related disciplines are invited to submit unpublished papers regarding software for novel many-core hardware architectures. The call for papers especially emphasizes on the challenges and research questions arising from the upcoming generation of heterogeneous and/or massive parallel systems stepping towards a many-core dominated exascale era. The topics of interest include, but are not limited to: * New approaches for operating systems on novel many-core architectures * Operating system extensions for addressing many-core related issues * Many-core aware runtime support for large-scale applications * Bare-metal programming and system software for many-cores * Dealing with legacy software on novel many-core architectures * Virtualization to deal with hardware limitations on many-cores * Support for interactivity with and between many-core applications * Message-passing interfaces and middleware for many-core systems * Heterogeneity- and/or hierarchy-aware many-core middleware * Concepts and methods for exploiting deep memory hierarchies * Operating system extensions for non-volatile memory support * Software stacks for new concepts of compute acceleration on many-cores * Interfaces for performance and power analysis on many-core systems * Runtime support for power-aware many-core computing Paper Submission ---------------- Submissions in PDF format should be between 10–12 pages in the Springer LNCS style, which can be downloaded from the Springer Web site ftp://ftp.springer.de/pub/tex/latex/llncs/latex2e/llncs2e.zip. The 12 pages limit is a hard limit. It includes everything (text, figures, references). On acceptance of the submission, at least one author is required to register for workshop attendance at Euro-Par 2017 and present the paper in the workshop session. Upload your submission to our submission server (https://www.easychair.org/conferences/?conf=europar2017workshops) in PDF format. It must not be simultaneously submitted to the main conference or any other publication outlet. For the workshop, we will prepare hand-outs with the accepted papers. The revised versions will be published after the conference in the workshop proceedings of Euro-Par 2017, part of the LNCS series of Springer. Further Information ------------------- See the ROME'17 website at http://www.rome.eonerc.rwth-aachen.de Important Dates --------------- * May 12, 2017: Submission deadline * June 16, 2017: Notification of acceptance * July 21, 2017: Workshop paper (for informal workshop proceedings) * October 3, 2017: Workshop camera-ready papers due Workshop Organizers ------------------- * Stefan Lankes, Institute for Automation of Complex Power Systems, E.ON Energy Research Center, RWTH Aachen University, Germany * Carsten Clauss, ParTec Cluster Competence Center GmbH, Germany Program Committee: ------------------ * Jens Breitbart, Robert Bosch GmbH * Carsten Clauss, ParTec Cluster Competence Center * Florian Kluge, Universität Augsburg * Stefan Lankes, RWTH Aachen University * Timothy G. Mattson, Intel Labs * Jörg Nolte, BTU Cottbus * Lena Oden, Jülich Supercomputing Centre * Antonio J. Peña, Barcelona Supercomputing Center * Swann Perarnau, Argonne National Laboratory * Andreas Polze, Hasso-Plattner-Institute * Pablo Reble, Intel Corporation * Bettina Schnor, University of Potsdam * Oliver Sinnen, University of Auckland * Christian Terboven, RWTH Aachen University * Josef Weidendorfer, TU München * Carsten Weinhold, TU Dresden -- Dr. rer. nat. Stefan Lankes Institute for Automation of Complex Power Systems E.ON Energy Research Center, RWTH Aachen University Mathieustraße 10 52074 Aachen, Germany Phone: +49-241-80-49740 E-Mail: slankes(a)eonerc.rwth-aachen.de

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[IEEE MCSoC-17, Seoul, Sep 18-20, 2017] Call For Papers(Final Deadline Extension : May 14, 2017)
by CFP MCSoC 28 Apr '17

28 Apr '17

IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip Hana Square (Science & Engineering Complex) Korea University, Seoul, Korea September 18-20, 2017 Symposium Overview The IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip aims to provide world’s premier forum of leading researchers in the embedded Multicore/Many-core SoCs software, tools and applications design areas for academia and industries. Prospective authors are invited to submit their contributions. Submission of a paper implies that at least one of the authors will have a full registration to the symposium upon acceptance of the paper. Topic of Interests Programming: Compilers, automatic code generation methods, cross assemblers, programming models, memory management, runtime management, object-oriented aspects, concurrent software. Architectures: Multicore/Many-core re-configurable platforms, memory management support, communication, protocols, real-time systems, SoCs and DSPs, heterogeneous architectures with HW accelerators and GPUs, deep-learning and neural networks. Design: Hardware specification, modeling, synthesis, low power simulation and analysis, reliability, variability compensation, thermal aware design, performance modeling, security issues. Interconnection Networks: Electronic/Photonic/RF NoC architectures, Power and energy issues in NoCs, Application specific NoC design, Timing, Synchronous /asynchronous communication, RTOS support for NoCs, modeling, simulation, NoC support for MCSoC, NoC for FPGAs and structured ASICs, NoC design tools, photonic components, virtual fabrications, photonic circuits, routing, filter design. Testing: Design-for-test, test synthesis, built-in-self-test, embedded test for MCSoC. Packaging Technologies: 3D VLSI packaging technology, vertical interconnections in 3D Electronics, periphery interconnection between stacked ICs, area interconnection between stacked ICs, thermal management schemes. Real-Time Systems: real-time system design, RTOS, compilation techniques, memory/cache optimization, interfacing and software issues, distributed real-time systems, real-time kernels, task scheduling, multitasking design. Benchmarks: Parallel benchmarks, workload characterization and evaluation. Applications: Bio-medical, health-care, computational biology, Internet of Things, smart mobility, electric vehicles, smart and connected cars, aviation, automobile, military, consumer electronics, and novel applications. Special Sessions: please visit http://www.mcsoc-forum.org/ Proceedings Publication and Indexing MCSoC-17 proceedings will be published by IEEE CS Press, which will be included in the Computer Society Digital Library CSDL and IEEE Xplore. All CPS conference publications are also submitted for indexing to EI’s Engineering Information Index, Compendex, and ISI Thomson’s Scientific and Technical Proceedings, ISTP/ISI Proceedings, and ISI Thomson. Important Dates Paper submission: May 14, 2017(Final Deadline Extension) Acceptance notification: June 23, 2017 Camera ready paper: July 14, 2017 Contact For any questions, please contact: mcsoc17(a)mcsoc-forum.org

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Deadline Extension: Resilience@Euro-Par 2017 - Papers due May 12
by Christian Engelmann 27 Apr '17

27 Apr '17

We apologize if you receive multiple copies of this call for papers. The submission deadline has been extended to May 12. -------------------------------------------------------------------------------- 10th Workshop on Resiliency in High Performance Computing (Resilience) in Clusters, Clouds, and Grids <http://www.csm.ornl.gov/srt/conferences/Resilience/2017 <http://www.csm.ornl.gov/srt/conferences/Resilience/2017>> in conjunction with the 23rd International European Conference on Parallel and Distributed Computing (Euro-Par), Santiago de Compostela, Spain, August 28 - September 1, 2017 <http://europar2017.usc.es <http://europar2017.usc.es/>> Overview: Resilience is a critical challenge as high performance computing (HPC) systems continue to increase component counts, individual component reliability decreases (such as due to shrinking process technology and near-threshold voltage (NTV) operation), and software complexity increases. Application correctness and execution efficiency, in spite of frequent faults, errors, and failures, is essential to ensure the success of the extreme-scale HPC systems, cluster computing environments, Grid computing infrastructures, and Cloud computing services. While a fault (e.g., a bug or stuck bit) is the cause of an error, its manifestation as a state change is considered an error (e.g., a bad value or incorrect execution), and the transition to an incorrect service is observed as a failure (e.g., an application abort or system crash). A failure in a computing system is typically observed through an application abort or a full/partial service or system outage. A detectable correctable error is often transparently handled by hardware, such as a single bit flip in memory that is protected with single-error correction double-error detection (SECDED) error correcting code (ECC). A detectable uncorrectable error (DUE) typically results in a failure, such as multiple bit flips in the same addressable word that escape SECDED ECC correction, but not detection, and ultimately cause an application abort. An undetectable error (UE) may result in silent data corruption (SDC), e.g., an incorrect application output. There are many other types of hardware and software faults, errors, and failures in computing systems. Resilience for HPC systems encompasses a wide spectrum of fundamental and applied research and development, including theoretical foundations, fault detection and prediction, monitoring and control, end-to-end data integrity, enabling infrastructure, and resilient solvers and algorithm-based fault tolerance. This workshop brings together experts in the community to further research and development in HPC resilience and to facilitate exchanges across the computational paradigms of extreme-scale HPC, cluster computing, Grid computing, and Cloud computing. Submission Guidelines: Authors are invited to submit papers electronically in English in PDF format. Submitted manuscripts should be structured as technical papers and BETWEEN 10 AND 12 PAGES, including figures, tables and references, using Springer's Lecture Notes in Computer Science (LNCS) format at <http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0 <http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0>>. Papers with less than 10 or more than 12 pages will not be accepted due to publisher guidelines. Submissions should include abstract, key words and the e-mail address of the corresponding author. Papers not conforming to these guidelines may be returned without review. All manuscripts will be reviewed and will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference attendees. Submitted papers must represent original unpublished research that is not currently under review for any other conference or journal. Papers not following these guidelines will be rejected without review and further action may be taken, including (but not limited to) notifications sent to the heads of the institutions of the authors and sponsors of the conference. Submissions received after the due date or not appropriately structured may also not be considered. The proceedings will be published in Springer's LNCS as post-conference proceedings. At least one author of an accepted paper must register for and attend the workshop for inclusion in the proceedings. Authors may contact the workshop program chairs for more information. Important websites: - Resilience 2017 Website: <http://www.csm.ornl.gov/srt/conferences/Resilience/2017 <http://www.csm.ornl.gov/srt/conferences/Resilience/2017>> - Resilience 2017 Submissions: <https://easychair.org/conferences/?conf=europar2017workshops <https://easychair.org/conferences/?conf=europar2017workshops>> - Euro-Par 2017 website: <http://europar2017.usc.es <http://europar2017.usc.es/>> Topics of interest include, but are not limited to: - Theoretical foundations for resilience: - Metrics and measurement - Statistics and optimization - Simulation and emulation - Formal methods - Efficiency modeling and uncertainty quantification - Fault detection and prediction: - Statistical analyses - Machine learning - Anomaly detection - Data and information collection - Visualization - Monitoring and control for resilience: - Platform and application monitoring - Response and recovery - RAS theory and performability - Application and platform knobs - Tunable fidelity and quality of service - End-to-end data integrity: - Fault tolerant design - Degraded modes - Forward migration and verification - Fault injection - Soft errors - Silent data corruption - Enabling infrastructure for resilience: - RAS systems - System software and middleware - Programming models - Tools - Next-generation architectures - Resilient solvers and algorithm-based fault tolerance: - Algorithmic detection and correction of hard and soft faults - Resilient algorithms - Fault tolerant numerical methods - Robust iterative algorithms - Scalability of resilient solvers and algorithm-based fault tolerance Important Dates: - Workshop papers due: May 12, 2017 - Workshop author notification: June 16, 2017 - Workshop early registration: TBD - Workshop paper (for informal workshop proceedings): July 21, 2017 - Workshop camera-ready papers: October 3, 2017 General Co-Chairs: - Stephen L. Scott Senior Research Scientist - Systems Research Team Tennessee Tech University and Oak Ridge National Laboratory, USA scottsl(a)ornl.gov <mailto:[email protected]> - Chokchai (Box) Leangsuksun, SWEPCO Endowed Associate Professor of Computer Science Louisiana Tech University, USA box(a)latech.edu <mailto:[email protected]> Program Co-Chairs: - Patrick G. Bridges University of New Mexico, USA bridges(a)cs.unm.edu <mailto:[email protected]> - Christian Engelmann Oak Ridge National Laboratory , USA engelmannc(a)ornl.gov <mailto:[email protected]> Program Committee: - Ferrol Aderholdt, Oak Ridge National Laboratory, USA - Dorian Arnold, University of New Mexico, USA - Rizwan Ashraf, Oak Ridge National Laboratory, USA - Wesley Bland, Intel Corporation, USA - Hans-Joachim Bungartz, Technical University of Munich, Germany - Franck Cappello, Argonne National Laboratory and University of Illinois at Urbana-Champaign, USA - Marc Casas, Barcelona Supercomputer Center, Spain - Zizhong Chen, University of California at Riverside, USA - Robert Clay, Sandia National Laboratories, USA - Miguel Correia, Universidade de Lisboa, Portugal - Nathan DeBardeleben, Los Alamos National Laboratory, USA - James Elliott, Sandia National Laboratories, USA - Kurt Ferreira, Sandia National Laboratories, USA - Michael Heroux, Sandia National Laboratories, USA - Saurabh Hukerikar, Oak Ridge National Laboratory, USA - Dieter Kranzlmueller, Ludwig-Maximilians University of Munich, Germany - Sriram Krishnamoorthy, Pacific Northwest National Laboratory, USA - Ignacio Laguna, Lawrence Livermore National Laboratory, USA - Scott Levy, University of New Mexico, USA - Kathryn Mohror, Lawrence Livermore National Laboratory, USA - Christine Morin, INRIA Rennes, France - Dirk Pflueger, University of Stuttgart, Germany - Nageswara Rao, Oak Ridge National Laboratory, USA - Alexander Reinefeld, Zuse Institute Berlin, Germany - Rolf Riesen, Intel Corporation, USA - Yves Robert, ENS Lyon, France - Thomas Ropars, Universite Grenoble Alpes, France - Martin Schulz, Lawrence Livermore National Laboratory, USA - Keita Teranishi, Sandia National Laboratories, USA -- Christian Engelmann, Ph.D. R&D Staff Scientist Computer Science Research Group Computer Science and Mathematics Division Oak Ridge National Laboratory Mail: P.O. Box 2008, Oak Ridge, TN 37831-6173, USA Phone: +1 (865) 574-3132 / Fax: +1 (865) 576-5491 e-Mail: engelmannc(a)ornl.gov <mailto:[email protected]> / Home: www.christian-engelmann.info <http://www.christian-engelmann.info/>

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[Deadline Extended] CFP - PBio 2017, ICA3PP Workshop (Springer LNCS proceedings) + Special Issues in Journal of Computational Biology (IF: 1.537, Q1) and Int. Journal of Parallel Programming (IF: 0.680, Q3)
by Miguel A. Vega-Rodriguez 27 Apr '17

27 Apr '17

Call for Papers - PBio 2017 --- 5th International Workshop on Parallelism in Bioinformatics (proceedings published by Springer LNCS), ICA3PP Workshop + Special Issue in the Journal of Computational Biology (Impact Factor: 1.537, Quartile Q1, ISSN: 1066-5277) + Special Issue in the International Journal of Parallel Programming (Impact Factor: 0.680, Quartile Q3, ISSN: 0885-7458) --- SUBMISSION DEADLINE: MAY 10, 2017 (EXTENDED) http://arco.unex.es/mavega/pbio/2017/ https://research.comnet.aalto.fi/ICA3PP2017/workshops.html We seek original, high-quality research papers, clearly focused on the application of Parallelism to any possible Bioinformatics problem. In particular, contributions are solicited on, but are not limited to, the following topics: - Parallel and distributed algorithms in Bioinformatics. - Workload partitioning strategies in Bioinformatics. - Memory-efficient algorithms in Bioinformatics. - Parallel tools and applications in Bioinformatics. - Data-intensive Bioinformatics (including Big Data storage and processing). - Multicore computing in Bioinformatics. - Multithreaded computing in Bioinformatics. - Cluster computing in Bioinformatics. - Supercomputing in Bioinformatics. - Cloud/Grid/P2P computing in Bioinformatics. - Volunteer computing in Bioinformatics. - Hardware accelerators (GPUs, FPGAs, etc.) in Bioinformatics. - Heterogeneous computing in Bioinformatics. - Green computing in Bioinformatics. - Mobile computing in Bioinformatics. - Emerging parallel programming models in Bioinformatics. - Parallel performance evaluation, analysis, and optimization in Bioinformatics. - Parallel visualization, modelling, simulation, and exploration in Bioinformatics. With regard to the Bioinformatics problems, many different alternatives exist: bioinformatics applied to biomedicine and drug design; biological sequence analysis, comparison and alignment; motif, gene and signal recognition/discovery; molecular evolution; phylogenetics and phylogenomics; determination or prediction of the structure of RNA and protein; DNA twisting and folding; gene expression and gene regulatory networks; deduction of metabolic pathways; microarray design and analysis; proteomics; functional genomics; molecular docking; design of DNA sequences for molecular computing; etc. All the details (paper format, submission system, important dates, etc.) at: http://arco.unex.es/mavega/pbio/2017/ https://research.comnet.aalto.fi/ICA3PP2017/workshops.html --- Kind regards. -- ------------------------------------------------- Dr. Miguel A. Vega-Rodriguez <mavega(a)unex.es> http://arco.unex.es/mavega ARCO Research Group University of Extremadura Dept. Technologies of Computers & Communications Escuela Politecnica. Campus Universitario, s/n 10003 Caceres. SPAIN Tel: +34-927-257263 Fax: +34-927-257187 -------------------------------------------------

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Deadline Extension: EuroMPI/USA 2017 - May 22, 2017
by Marc-André Hermanns 26 Apr '17

26 Apr '17

******************************************************************************* *** EuroMPI/USA 2017: Call for Papers ******************************************************************************* The 24th European MPI Users' Group Meeting September 25-28, 2017 https://www.mcs.anl.gov/eurompi2017/ Twitter: @eurompiconf ========== Background ========== EuroMPI is the preeminent meeting for users, developers and researchers to interact and discuss new developments and applications of message-passing parallel computing, in particular in and related to the Message Passing Interface (MPI). EuroMPI/USA 2017 will continue to focus on not just MPI, but also extensions or alternative interfaces for high-performance homogeneous/heterogeneous/hybrid systems, benchmarks, tools, parallel I/O, fault tolerance, and parallel applications using MPI and other interfaces. Through the presentation of contributed papers, poster presentations and invited talks, attendees will have the opportunity to share ideas and experiences to contribute to the improvement and furthering of message-passing and related parallel programming paradigms. ====== Topics ====== Topics of interest include, but are not limited to: * Implementation Issues - MPI implementation issues and improvements towards exascale computing, such as manycores, GPGPU, and heterogeneous architectures. - Interaction between message-passing software and hardware, in particular new high-performance architectures. - New MPI-IO mechanisms and I/O stack optimizations. * Programming Models - Extensions to and shortcomings of MPI. - Hybrid and heterogeneous programming with MPI and other interfaces. - MPI support for data-intensive parallel applications. - Fault tolerance in message-passing implementations and systems. - New programming paradigms implemented over MPI, like hierarchical programming and global address spaces - MPI parallel programming in clouds. * Applications and Performance - Performance evaluation for MPI and MPI-based applications. - Automatic performance tuning of MPI applications and implementations. - Verification of message-passing applications and protocols. - Applications using message passing, in particular in computational science and scientific computing. - Parallel algorithms in the message-passing paradigm. - MPI applications performance on clouds. =============== Important Dates =============== Full paper submission due: May 22, 2017 Authors notification: July 3, 2017 Camera-ready papers due: July 27, 2017 Conference dates: September 25-28, 2017 ======================= Submission Instructions ======================= To be considered, your paper must be formatted according to the ACM SIG Proceedings Template and up to 10 pages in length. The page limit includes figures, tables, and appendices, but does not include references, for which there is no page limit. Margins and font sizes should not be modified. Style files can be found at: http://www.acm.org/publications/icps-instructions/ Authors should submit their work through the Euro MPI 2017 Submission Site: www.easychair.org/conferences/?conf=eurompiusa2017 ===================== Journal Special Issue ===================== Select papers will be invited to submit revised and extended versions to be considered for inclusion in an invitation-only special issue of the Elsevier Parallel Computing journal. The extended version of the paper must have at least 30% additional content compared to the version published at EuroMPI/USA 2017. ====================== Workshops and Symposia ====================== * Symposium Celebrating 25 Years of MPI * Enhancing Parallel Scientific Applications with Accelerated HPC (ESAA) -> https://www.arcos.inf.uc3m.es/wp/esaa2017/ * Extending MPI for Resilience (EMPIRE) -> https://icl.utk.edu/workshops/EMPIRe2017 * Skills to Thrive: Second EuroMPI Careers in HPC Workshop -> http://www.womeninhpc.org/events/skills-to-thrive-careers-in-hpc/ * Programming Model Alternatives to Message Passing (PMAMP) -> https://memani1.github.io/pmamp17/ ============ Organization ============ General Chair: Pavan Balaji, Argonne National Laboratory Program Co-chairs: William Gropp, University of Illinois, Urbana-Champaign Rajeev Thakur, Argonne National Laboratory Posters Chair: Kathryn Mohror, Lawrence Livermore National Laboratory Workshops Chair: Jesper Larsson Träff, Vienna University of Technology Proceedings Chair: Antonio J. Peña, Barcelona Supercomputing Center Finance and Registrations Co-Chairs: Sangmin Seo, Argonne National Laboratory Min Si, Argonne National Laboratory Web Chair: Abdelhalim Amer, Argonne National Laboratory Publicity Chair: Masamichi Takagi, RIKEN Marc-André Hermanns, Jülich Supercomputing Centre Local Arrangements Chair: Mary Dzielski, Argonne National Laboratory The full list of the EuroMPI/USA 2017 Program Committee can be found at: http://www.mcs.anl.gov/eurompi2017/pgc.htm -- Marc-Andre Hermanns Jülich Aachen Research Alliance, High Performance Computing (JARA-HPC) Jülich Supercomputing Centre (JSC) Wilhelm-Johnen-Str. 52425 Jülich Germany Phone: +49 2461 61 2509 | +49 241 80 24381 Fax: +49 2461 80 6 99753 www.jara.org/jara-hpc email: m.a.hermanns(a)fz-juelich.de

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HPCA 2018 CFP
by Yuan Xie 26 Apr '17

26 Apr '17

************************************************************ ***************** CALL FOR PAPERS HPCA 2018 24th IEEE International Symposium on High-Performance Computer Architecture http://hpca2018.ece.ucsb.edu February/March 2018 Vienna, Austria ************************************************************ ***************** The International Symposium on High-Performance Computer Architecture provides a high-quality forum for scientists and engineers to present their latest research findings in this rapidly-changing field. Authors are invited to submit papers on all aspects of high-performance computer architecture. Topics of interest include, but are not limited to: * Processor, cache, and memory architectures * Parallel computer architectures * Multicore and multiprocessor architectures * Impact of technology on architecture * Dependable/secure architectures * High-performance I/O systems * Embedded, reconfigurable, and heterogeneous architectures * Interconnect and network interface architectures * Architectures for cloud-based HPC and data centers * Innovative hardware/software trade-offs * Impact of compilers and system software on architecture * Performance modeling and evaluation * Architecture for novel application workloads, such as AI or graph analytics * Architectures for emerging technology and applications Authors should submit an abstract by July 25, 2017 11:59 PM CDT. They should submit the full version of the paper August 1, 2017, 11:59 PM CDT. No extensions will be granted. The full version should be a PDF file following the submission guidelines that will be made available at the submission website. Papers should be submitted for blind review. New-idea papers as well as papers that significantly advance established areas are strongly encouraged. Submission issues should be directed to the program chair at yuanxie(a)ece.ucsb.edu. HPCA-24 will host an Industrial Paper Session presenting novel insights from industry. See the HPCA 2018 website at http://hpca2018.ece.ucsb.edu for additional information about HPCA 2018 and submission details. General Chair: Michael Gschwind (IBM Corp.) Program Chair: Yuan Xie (UCSB) Important Dates: Abstract submission: July 25, 2017 Paper submission: August 1, 2017

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WHPC @ ISC2017 Call for Posters EXTENDED to May 7
by Sunita Chandrasekaran 26 Apr '17

26 Apr '17

> Women in HPC at ISC 2017: Workshop Call for posters and participation > In collaboration with ISC High Performance 2017 > Thursday 22 June 2017 (Time to be confirmed) > http://www.womeninhpc.org/women-in-hpc-at-isc-2017/workshop > > Women in HPC will once again attend the ISC High Performance Computing > conference to discuss diversity and will bring together women from across > the international HPC community, providing opportunities to network, > showcasing the work of inspiring women and discussing how we can all work > towards to improving the under-representation of women in supercomputing. > > The sixth international Women in High Performance Computing (WHPC) > workshop, at ISC 2017, Frankfurt, Germany will once again bring together > the HPC community to discuss the growing importance of increasing diversity > in the workplace. This workshop aims to recognize and discuss the > challenges faced by women, one of many underrepresented groups that exist > in HPC, as well as opportunities for broadening participation in HPC fields > and activities to encourage women to enter the field with consideration of > differing legislation affecting hiring and employment practices among the > different countries. > Panel discussion and breakout sessions > We will host a panel discussion and breakout sessions inviting questions > and suggestions from the audience on how employers can help diversify the > HPC workforce, the obstacles employers face, and sharing best practise > across the international community from a variety of HPC employers. > Breakout 1 (Improving Diversity in the Workplace): What methods have you > put in place to improve workplace diversity? > Breakout 2 (Career Development/Mentoring): Skills to thrive; sharing your > experiences and advice on your successes in the workplace. > > Call for posters: Now Open! > Deadline for submissions > EXTENDED TO MAY 7 AOE > As part of the workshop we will be inviting submissions from female early > career researchers to present their work as a poster in a supportive > environment that promotes the engagement of women in HPC research and > applications, providing opportunities for peer to peer networking and the > opportunity to interact with female role models. > To submit your work please email your abstract as a word or text document > containing the following information to info(a)womeninhpc.org > > - Full name of main (presenting) author, short biography (150 words) > and photograph for website publicity > - Names of any other authors; > - Current institution of all authors; > - Abstract (up to 250 words) > > For full details please see: http://www.womeninhpc.org/wome > n-in-hpc-at-isc-2017/workshop/submit > <http://www.womeninhpc.org/women-in-hpc-at-isc-2016/workshop/submit> > > Workshop Committee > > Chairs > > - Workshop Chair: Toni Collis, EPCC, UK and Women in HPC Network, UK > - Poster Chair: Misbah Mubarak, Argonne National Laboratory, USA > - Mentoring Chair: Rebecca Hartman-Baker, NERSC, USA > - Publicity Chair: Kimberly McMahon, Xand McMahon, USA > > Steering and Organisation Committee > > - Julia Andrys, Murdoch University, Western Australia > - Sunita Chandrasekaran, University of Delaware, USA > - Trish Damkroger, Intel, USA > - Rebecca Hartman-Baker, NERSC, USA > - Daniel Holmes, EPCC, UK Adrian Jackson, EPCC, UK > - Jessica Nettelblad, Uppsala University, Sweden > - Kimberly McMahon, Xand McMahon, USA > - Lorna Rivera, University of Illinois, USA > > Programme Committee (for early career posters) > Posters Chair: Misbah Mubarak (Argonne National Laboratory) > > - Sunita Chandrasekaran, University of Delaware, USA > - Rebecca Hartman-Baker, NERSC, USA > - Daniel Holmes, EPCC, UK > - Adrian Jackson, EPCC, UK > - Alison Kennedy, Hartree Centre, STFC, UK > - Lorna Rivera, University of Illinois, USA > - Jesmin Jahan Tithi, Parallel Computing Lab, Intel Corporation, USA > > > > The University of Edinburgh is a charitable body, registered in > Scotland, with registration number SC005336. >

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