November 2019 - hpc-announce - mailman3.cels.anl.gov

Call for Data Mining Competition -- FedCSIS at the KnowledgePit Platform
by Marcin Paprzycki 30 Nov '19

30 Nov '19

We invite industrial, government, and academic organizations to submit proposals to organize a Data Mining Competition at the 15th Conference on Computer Science and Information Systems (FedCSIS 2020). Data Mining Competitions are based on data sets released by the sponsoring organizations. The competitions will last for several months, with the winners announced at the conference on September 6-9, 2020. Data Mining Competitions associated with the FedCSIS Conference Series have a long tradition. Since 2014, they have been organized every year at the KnowledgePit Platform, and in total, they attracted over 1200 teams from more than 40 countries. The competitions are usually focused on learning the most accurate classification / prediction / forecasting models based on the provided data sets. The participants are free to use all machine learning / data mining methods that they find as useful. Those who are willing to organize a competition need to remember about the following: The tasks should be challenging but achievable within the expected timeline of the competition. The data sets should be novel. They cannot be available before the competition begins. The KnowledgePit Team will assist in preparation of publicly available versions of the competition data sets. The organizers will be requested to cooperate with the KnowledgePit Team in order to describe the task and the data in the most clear way to the competition participants. We will consider topics from (but not limited to) the following application domains: - Mobility - Health and wellness - Finance - Advanced manufacturing - Predictive maintenance - Retail and e-commerce - Gaming industry - Cybersecurity - Smart City and Community The proposals will be evaluated based on the significance and novelty of the considered problem, clarity of its definition, and availability of the related data. The competition will be hosted at the KnowledgePit Platform which provides an automatic submission and evaluation system, and maintains a leaderboard for the participants. Competition winners will be selected based on their final ranking, as well as a short report describing their algorithms and results. Top performing teams will also be invited to publish a regular paper at FedCSIS 2020, where they will be able to present their solution during the special competition session. The additional paper will be prepared and presented jointly by the Competition Organizers and the KnowledgePit Team. Tentative Competition Timeline. Step 1 – Submissions of competition proposals due, December 20, 2019 Step 2 – Proposal evaluation and acceptance decisions due, December 31, 2019 Step 3 – Data release, the start of the challenge, January 13, 2020 Step 4 – Deadline for participants to submit final solutions and reports, May 3, 2020 Step 5 – Publication of final results, May 15, 2020 Data Mining Challenge Proposal Format Proposals should answer the following questions: - Who are the organizers? Provide the names, affiliations, contact information, and brief bio of the organizers. - Which sector/application domain is considered in the proposed Data Mining Challenge? - What kind of data set will be provided? Please describe its essential characteristics. If there are privacy concerns regarding the data, please explain in detail. The KnowledgePit Platform may provide additional services regarding the anonymization of the data. For more information, please contact the platform staff (contact(a)knowledgepit.ml) - What are the considered task and the proposed evaluation metrics? - What prizes will be offered to winners? Deadline for submissions of proposals: December 20, 2019. Please send the proposals to: contact(a)knowledgepit.ml FedCSIS 2020 Data Mining Challenge Co-Chairs Piotr Biczyk, QED Software (piotr.biczyk(a)qed.pl) Andrzej Janusz, Warsaw University & QED Software (andrzej.janusz(a)qed.pl)

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The Fifth International Conference on Internet of Things, Big Data and Security 2020 (IoTBDS 2020; 7-9 2020; Prague, Czech Republic)
by Chang V.I. 30 Nov '19

30 Nov '19

Dear colleagues, We have the Fifth International Conference on Internet of Things, Big Data and Security 2020 (IoTBDS 2020), to be held in Prague, Czech Republic, between 7-9 May,2020. Submission deadline is 13th Dec, 2020. We work with high quality journals, well-known keynote speakers and researchers/scientists/practitioners/decision-makers from all over the world. Please check our websites http://www.complexis.org/, http://femib.scitevents.org/ with the same submission deadlines and also https://www.facebook.com/ES2014ECs2015/. We have the support from Expert Systems (Wiley), Applied Sciences (MDPI) and a few more top journals. Our conference has a technical sponsorship from IEEE SMC Society and has index from Scoupus, EI etc. We look forward to meeting you. Many thanks in advance. Thanks and regards, Victor CALL FOR PAPERS 5th International Conference on Internet of Things, Big Data and Security IoTBDS website: http://www.iotbds.org May 7 - 9, 2020 Prague, Czech Republic In Cooperation with: DNS.PT and EuroCloud. Proceedings will be submitted for indexation by: DBLP, Thomson Reuters, EI, SCOPUS, Semantic Scholar and Google Scholar. IMPORTANT DATES: Regular Paper Submission: December 13, 2019 Authors Notification (regular papers): February 12, 2020 Final Regular Paper Submission and Registration: February 27, 2020 Position Paper Submission: January 29, 2020 Authors Notification (position papers): March 5, 2020 Final Regular Paper Submission and Registration: March 18, 2020 Scope: The internet of things (IoT) is a platform that allows a network of devices (sensors, smart meters, etc.) to communicate, analyse data and process information collaboratively in the service of individuals or organisations. The IoT network can generate large amounts of data in a variety of formats and using different protocols which can be stored and processed in the cloud. The conference looks to address the issues surrounding IoT devices, their interconnectedness and services they may offer, including efficient, effective and secure analysis of the data IoT produces using machine learning and other advanced techniques, models and tools, and issues of security, privacy and trust that will emerge as IoT technologies mature and become part of our everyday lives. Big Data (BD) has core values of volume, velocity, variety and veracity. After collecting much data from IoT, BD can be jointly used with machine learning, AI, statistical and other advanced techniques, models and methods, which can create values for people and organizations adopting it, since forecasting, deep analysis and analytics can help identify weaknesses and make improvements based on different analysis. Maintaining a high level of security and privacy for data in IoT are crucial and we welcome recommendations, solutions, demonstrations and best practices for all forms of security and privacy for IoT and BD. Conference Topics: Area 1: Big Data Research - Big Data Fundamentals: Volume, Velocity, Variety, Veracity and Value - Modeling, Experiments, Sharing Technologies & Platforms - Analytics, Intelligence and Knowledge Engineering - Data Center Enabled Technologies - Networking and Social Networks - Data Management for Large Data - Software Frameworks (MapReduce, Spark Etc) and Simulations - Social Science and Implications for Big Data Area 2: Emerging Services and Analytics - Health Informatics as a Service (HIaaS) for Any Type of Health Informatics, Computation and Services - Big Data as a Service (BDaaS) including Frameworks, Empirical Approaches and Data Processing Techniques - Big Data Algorithm, Methodology, Business Models and Challenges - Security as a Service including Any Algorithms, Methodology and Software Proof-of-Concepts - Financial Software as a Service (FSaaS) including Risk and Pricing Analysis; Predictive Modeling - Education as a Service (EaaS) including eLearning and Educational Applications - Business Process as a Service (BPaaS) including Workflows and Supply Chain in IoT and Big Data - Analytics as a Service (AaaS) for Any Types of Analytics - Scheduling, Service Duplication, Fairness, Load Balance for SaaS and Analytics - eGovernment, eCommerce, eScience and Creative Technologies for IoT and Big Data - IoT Services and Applications - New Service Models and Emerging Services Area 3: Internet of Things (IoT) Fundamentals - Software Architecture and Middleware - Context-Awareness and Location-Awareness - Performance Evaluation and Modeling - Networking and Communication Protocols - Machine to Machine Communications - Energy Efficiency - Software Engineering for IoT and IoE - Machine Learning and Deep Learning Approaches Data Analytics Area 4: Internet of Things (IoT) Applications - Technological Focus for Smart Environments - Smart City Examples and Case Studies - Architecture for Secure and Interactive IoT - Intelligent Infrastructure and Guidance Systems for Vehicles, Green Systems and Smart City - Sensor Networks, Remote Diagnosis and Development - Transportation Management Traffic Theory, Modeling and Simulation - Social Implications for IoT Intelligent - Systems for IoT and Services Computing Area 5: Big Data for Multi-discipline Services - Smart City and Transportation - Education and Learning - Business, Finance and Management - Social Networks Analysis, Media and eGovernment - Risk Modeling, Simulation, Legal Challenges - Case Studies of Real Adoption - Biomedical Experiments and Simulations - Healthcare Services and Health Informatics Area 6: Security, Privacy and Trust - Algorithms, Software Engineering and Development - Testing (Software Engineering; Penetration; Product Development) - Encryption (All Aspects) - Firewall, Access Control, Identity Management - Experiments on Using Security Solutions and Proof-of-Concepts - Intrusion and Detection Techniques - Social Engineering and Ethical Hacking: Techniques and Case Studies - Software Engineering for Security Modeling, Business Process Modeling and Analytics - Location-Based Privacy - Data Security, Data Recovery, Disaster Recovery - Adoption Challenges and Recommendation - Emerging Issues and Recommendations for Organizational Security - Case Studies - Security, Privacy and Trust Area 7: IoT Technologies - 3D Printing - Artificial Intelligence - Biotechnology - Communication - Data Processing - Electronic Technologies for in-Vehicle - Internet of Things - Mode-to-Mode Systems - Nanotechnology - Sensors - Transport Safety and Mobility - Vehicle-to-Infrastructure - Vehicle-to-Vehicle IoTBDS KEYNOTE LECTURE Schahram Dustdar, Vienna University of Technology, Austria IoTBDS CONFERENCE CHAIR: Victor Chang, Teesside University, United Kingdom IoTBDS PROGRAM CHAIR: Gary Wills, University of Southampton, United Kingdom Péter Kacsuk (honorary), MTA SZTAKI, Hungary LOCAL CHAIR Mouzhi Ge, Masaryk University, Czech Republic PUBLICITY CHAIRS Anna Kobusinska, Poznan University of Technology, Poland Mohamed Abdel-Basset, Zagazig University, Egypt PROGRAM COMMITTEE http://www.iotbds.org/ProgramCommittee.aspx WORKSHOPS Artificial Intelligence for Emerging IoT Systems: Open Challenges and Novel Perspectives - AI4EIoTs

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Euro-Par 2020 - Call for Papers
by Krzysztof Rzadca 28 Nov '19

28 Nov '19

Euro-Par 2020 26th International European Conference on Parallel and Distributed Computing Warsaw, Poland, 24-28 August 2020 https://2020.euro-par.org/ 2020(a)euro-par.org Important Dates * Abstract Submission: 7 February 2020 * Paper Submission Deadline: 14 February 2020 * Author Notification: 30 April 2020 * Camera-Ready Papers: 5 June 2020 Euro-Par is the prime European conference covering all flavors of parallel and distributed processing: * from theory to practice, * from multi-core processors to accelerators, supercomputers and clouds, * from fundamental algorithmic problems to systems and tools, * from applications in computational sciences to machine learning and artificial intelligence. Euro-Par proceedings are published by Springer in the LNCS series. The main audience of Euro-Par are the researchers in academic institutions, government laboratories and industrial organisations. Euro-Par's objective is to be the primary choice of such professionals for the presentation of new results in their specific areas. Euro-Par's unique organization into topics provides an excellent forum for focused technical discussion, as well as interaction with a large, broad and diverse audience. In addition, Euro-Par conferences provide a platform for a number of accompanying, technical workshops for smaller and emerging communities. This call for conference papers will be followed by a separate call for workshop papers (in February 2020) and for posters for the doctoral symposium (in March 2020). Chairs: Maciej Malawski (AGH University of Science and Technology), Krzysztof Rzadca (University of Warsaw) Submission Guidelines Submit your papers through EasyChair: https://easychair.org/conferences/?conf=europar2020 * Papers must be in PDF format and should not exceed 12 pages (including references) and 7500 words. * Papers must be formatted in the Springer LNCS style: https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu… * Papers that don't meet these requirements might be rejected without a review. * Only contributions that are not submitted elsewhere or currently under review will be considered. * All submitted papers will be checked for originality by Springer iThenticate. Papers which show an insufficient originality might be rejected without a review. Topics We invite submissions of high-quality, novel and original research results in areas of parallel and distributed computing covered by the List of Topics. See https://2020.euro-par.org/calls/ for a detailed scope of each topic. Topic 1: Support Tools and Environments Global Chair: Michael Gerndt, Technical University of Munich, Germany Local Chair: Mariusz Sterzel, Academic Computer Centre Cyfronet AGH, Krakow, Poland Topic 2: Performance and Power Modeling, Prediction and Evaluation Global Chair: Arnaud Legrand, Univ. Grenoble Alpes, Inria, CNRS, France Local Chair: Ariel Oleksiak, Poznan Supercomputing and Networking Center, Poland Topic 3: Scheduling and Load Balancing Global Chair: Sascha Hunold, Technical University Wien, Austria Local Chair: Joanna Berlinska, Adam Mickiewicz University, Poznan, Poland Topic 4: High Performance Architectures and Compilers Global Chair: Leonel Sousa, INESC-ID, IST, University of Lisbon, Portugal Local Chair: Pawel Czarnul, Gdansk University of Technology, Poland Topic 5: Data Management, Analytics and Machine Learning Global Chair: Morris Riedel, Forschungszentrum Juelich, Germany Local Chair: Jacek Sroka, University of Warsaw, Poland Topic 6: Cluster, Cloud and Edge Computing Global Chair: Maria S. Perez, Universidad Politecnica de Madrid, Spain Local Chair: Lukasz Dutka, Academic Computer Centre Cyfronet AGH, Kraków, Poland Topic 7: Theory and Algorithms for Parallel and Distributed Processing Global Chair: Ben Moseley, Carnegie-Mellon University, UA Local Chair: Marek Klonowski, University of Wroclaw, Poland Topic 8: Parallel and Distributed Programming, Interfaces, and Languages Global Chair: Phil Trinder, University of Glasgow, United Kingdom Local Chair: Wojciech Turek, AGH University of Science and Technology, Krakow, Poland Topic 9: Multicore and Manycore Parallelism Global Chair: Arturo Gonzalez, Universidad de Valladolid, Spain Local Chair: Witold Rudnicki, University of Bialystok, Poland Topic 10: Parallel Numerical Methods and Applications Global Chair: Hatem Ltaief, KAUST, Saudi Arabia Local Chair: Erin Carson, Charles University, Prague, Czechia Topic 11: Accelerator Computing Global Chair: Alba Cristina Melo, University of Brasilia, Brasil Local Chair: Lukasz Kuczynski, Czestochowa University of Technology, Poland

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Call-for-participation: Dec. 3-4, 2019: 11th Annual Concurrent Collections Workshop (CnC'19)
by Pouchet,Louisnoel 28 Nov '19

28 Nov '19

[Apologies if you receive multiple copies] CnC 2019: The Eleventh Annual Concurrent Collections Workshop December 3–4, 2019 at the University of Utah (Salt Lake City, UT) https://cnc-workshop.github.io/cnc2019/ The annual Concurrent Collections (CnC) workshop is as a forum for researchers and developers of parallel programs to interact on a variety of issues related to next-generation parallel programming models. The focus is on fostering a community around the CnC programming model; however, we also strongly encourage participation by anyone with an interest programming models inspired by dataflow and/or tuple space ideas as well as current or emerging applications of such models. location The workshop will be held at the University of Utah, in Salt Lake City, UT. See https://cnc-workshop.github.io/cnc2019/ for more information. Background on CnC: CnC is a parallel programming model for mainstream programmers that philosophically differs from other approaches. CnC programmers do not specify parallel operations. Instead, they only specify semantic ordering constraints. This provides a separation of concerns between the domain expert and tuning expert, simplifying the domain expert’s job while providing more flexibility to the tuning expert. Details on CnC and related research can be found at: https://icnc.github.io and https://habanero.rice.edu/cnc Online registration: Thanks to the generous donations from our sponsors, we will not require a registration fee for workshop attendance this year. Registration form to come soon (Utah students: feel free to stop by without registration). Agenda for the workshop (tentative): Tuesday morning (tutorials) 9:30am: Introduction to CnC: A dependence programming model Kath Knobe, Rice University 10:30am: Introduction to Intel Concurrent Collections Louis-Noel Pouchet Colorado State University 11:30am: MADNESS -- a moving target Robert Harrison, IACS, Stony Brook University Tuesday afternoon (keynote and technical talks): 1:00pm: Keynote: How to Sugarcoat System Resilience? Ganesh Gopalakrishnan School of Computing, University of Utah 2:00pm: Formalizing CnC semantics Tiago Cogumbreiro and Kath Knobe U. Massachusetts and Rice University 2:30pm: CnC Program Annotations Zoran Budimlic and Kath Knobe Rice University 3:30pm: Continuation Marks: Compiler-Visible and Concurrency-Friendly Reflection on Control (Invited talk) Matthew Flatt University of Utah 4:00pm: A CnC-like language to optimize DNA manufacturing processes Louis-Noel Pouchet and Jean Peccoud Colorado State University 4:30pm: AEfficient Execution of Dynamic Programs using Data-Flow Parallel Paradigm Mohammad Mahdi Javanmard Stony Brook University Wednesday morning (keynote and technical talks): 9:00am: Keynote: Specialized dataflow DSL as an alternative programming paradigm George Bosilca U. Tenesse 10:30am: Distributed Hierarchical CnC Runtime Srdjan Milakovic and Zoran Budimlic Rice University 11:00am: CnC-in-CnC Kath Knobe Rice University 11:30am: Tracing for Distributed CnC Srdjan Milakovic and Zoran Budimlic Rice University Workshop chairs and contacts for the organization: Louis-Noel Pouchet, Colorado State University pouchet(a)colostate.edu P. Sadayappan, University of Utah, saday(a)cs.utah.edu -- Louis-Noel Pouchet pouchet(a)colostate.edu

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CFP - The 10th Workshop on Big Data and Cloud Performance (DCPerf'20) at IEEE Infocom'20
by Peter Mueller 28 Nov '19

28 Nov '19

Call for Papers ----------------------------------------------------------------- The 10th International Workshop on Big Data and Cloud Performance (DCPerf’20) ----------------------------------------------------------------- in conjunction with IEEE INFOCOM 2020 April 27, 2020, Beijing, China https://infocom2020.ieee-infocom.org/workshop-big-data-and-cloud-performance The 10th Workshop on Big Data and Cloud Performance (DCPerf'20) will be held in conjunction with the IEEE INFOCOM'20 in Beijing, China on April 27, 2020. The goal of DCPerf is to promote a community-wide discussion to identify suitable strategies to enable effective and scalable performance optimizations. Submissions on any topics of datacenter, cloud and bigdata performance are welcome. Submission site will remain open until Jan. 8th, 2020. Cloud data centers are the backbone infrastructure for tomorrow's information technology. Their advantages are efficient resource provisioning and low operational costs for supporting a wide range of computing needs, be it in business, scientific or mobile/pervasive environments. Because of the rapid growth in user-defined and user-generated applications and content, the range of services provided at data centers will expand tremendously and unpredictably. Particularly, big data applications and services, e.g., social and environmental sensing, and IoT monitoring, present a unique class of challenges in the Cloud. In addition, the high volume of mixed workloads and the diversity of services offered render the performance optimization of data centers even more challenging. Moreover, important optimization criteria, such as scalability, reliability, manageability, power efficiency, area density, and operating costs, are often conflicting. The increasing mobility of users across geographically distributed areas adds another dimension to optimizing big data and cloud applications. The goal of this workshop is to promote a community-wide discussion to identify suitable strategies to enable effective and scalable performance optimizations. We are looking for papers that present new techniques, introduce new methodologies, propose new research directions, or discuss strategies for resolving open performance problems for hosting big data analytics in the cloud. Topics of interest include (but are not limited to): - Big data applications and services - Emerging IoT applications - Data flow management - Processing platforms - Empirical studies - Cloud systems - Novel architectures - Resource allocation - Content distribution - Evaluation/modeling methodology - Big data and cloud performance - Cost/pricing design - Power/energy management - Reliability/dependability - Performance evaluation/modeling - Big data in the cloud - Intra/Inter communication - Network protocols - Security - Real-time analytics Important Dates: Paper Registration and Abstract Submission: Jan. 8th, 2020 Full Paper Submission: Jan. 15th, 2020 Notification of Acceptance: Feb. 15th, 2020 Final Manuscript Due: March 6, 2020 Submission Guideline: Manuscripts must be limited to 6 pages in IEEE 8.5x11-inch format. Accepted papers will be published in the combined INFOCOM 2020 Workshop proceedings and will be submitted to IEEE Xplore. Submitted papers may not have been previously published in or be under consideration for publication in another journal or conference. The reviews will be single blinded. Manuscripts should be submitted as PDF files via EDAS link: https://edas.info/newPaper.php?c=26866&track=99584 Committee: General Chair Wanyang Dai, Department of Mathematics, Nanjing University, China TPC co-Chairs Peter Mueller, IBM Research Zurich Lab, Switzerland Rui Han, School of Computer Science&Technology, Beijing Insititute of Technology Steering Committee Jiannong Cao (Hong Kong Polytechnic University, Hong Kong) Alok Choudhary (Northwerstern University, USA) Lydia Y. Chen, Distributed System Department, Delft University of Technology, The Netherlands Martin Schmatz (IBM Research Zurich Lab, Switzerland) Anand Sivasubramaniam (Penn State University, USA) Larry Xue (Arizona State University, USA) Contact: Peter Mueller - pmu(a)zurich.ibm.com

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EuroExaScale @ HiPEAC 2020 Deadline Extension
by Enrico Calore 27 Nov '19

27 Nov '19

Dear all, we would like to inform you that the deadline to submit contributions to the EuroEXAScale Workshop, has been extended to December 8th, 2019. EuroEXAScale Workshop will be held January 20th, in conjunction with HiPEAC 2020, in Bologna, Italy. All the relevant information can be found at the official web page: http://euroexascale.cslab.ece.ntua.gr/ as well as in the following. About the workshop ================== The international race to develop the world’s first exascale supercomputer is the next frontier in High Performance Computing (HPC). However, building an exascale supercomputer requires substantial changes to the current technological models, including the areas of energy consumption, scalability, network topology, memory, storage, resilience and, consequently, the programming models and systems software – none of which currently scales to these performance levels –. The EuroEXA project (euroexa.eu) targets to provide the template for an upcoming exascale system by co-designing and implementing a petascale-level prototype with ground-breaking characteristics. In this workshop, we will bring together international top-researchers from all over Europe and beyond, to talk about the challenges, insights and solutions for building exascale hardware and software, procuring exascale-class systems and achieving exascale application performance, with a special focus on hardware and software co-design. Topics of interest ================== - HPC application preparation for exascale, including programming models - HPC Application/System co-design - System software for exascale (operating systems, resource managers, middleware, runtime systems) - Hardware design for exascale systems (processors, accelerators, interconnection networks) - Infrastructure challenges in building and operating exascale systems (power density and capacity, electrical infrastructure, cooling, monitoring) Call for abstracts ================== Authors are invited to submit extended abstracts containing research within the topics of interest, or hot and potentially controversial work in progress related to the topics of interest. Authors should submit a PDF file up to 2 pages of double column text using single spaced 10 point size on 8.5x11 inch pages, as per IEEE 8.5 x 11 manuscript guidelines. Templates are available from the IEEE website. Submission link =============== https://easychair.org/conferences/?conf=euroexascale2020 Important dates =============== Abstract submission due: December 8th, 2019 - EXTENDED Notification of Acceptance: December 16th, 2019 - EXTENDED Early bird registration: December 25th, 2019 Workshop: January 20th, 2020 Best Regards, on behalf of the Organizing Committee, Georgios Goumas, NTUA/ICCS Nikela Papadopoulou, NTUA/ICCS Tom Vander Aa, imec Enrico Calore, INFN

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CFP: 7th International Workshop on the Recursive InterNetworkArchitecture (RINA 2020): Challenging RINA
by Ye Liu (刘野) 27 Nov '19

27 Nov '19

*Call for Papers* *7th International Workshop on the Recursive InterNetwork Architecture (RINA 2020): Challenging RINA* During the last decade research funding bodies have supported “Future Internet” or “Clean-slate” design initiatives intended to reduce network complexity by redesigning the network protocol architecture, questioning some of its key principles. Industry groups such as the ETSI ISG NGP are looking at alternatives to the current “TCP-IP” protocol suite. However, few initiatives have really been able to “clean the slate” and question the core model and underlying principles of current Internet protocols. Of those who have done it, RINA – the Recursive InterNetwork Architecture - is probably the simplest yet most general solution. RINA implementations are maturing while researchers keep working in characterizing its applicability to a wide variety of current networking challenges. During the last year RINA has been featured in an ETSI ISG NGP group report as a potential candidate for future-proof protocols, and the standardization work on its core specifications at ISO has advanced to Committee Draft Standards. New projects like RINArmenia are working to develop RINA expertise at the national level, and are teaming with the local industry to implement and deploy the technology in a variety of markets. In addition to papers that investigate and experiment with different properties of the RINA architecture, this year’s RINA Workshop especially welcomes papers that challenge the RINA principles and show limitations it its approach, disprove its claims or provide a simple solutions without compromising the benefits obtained by following the RINA architectural principles. Such papers can present improvements to IP-based technologies, or alternative approaches such as ICN, NDN or SCION to name a few. The RINA Workshop also solicits papers that investigate the application of RINA in different types of network segments and applications, papers reporting on prototype implementations, experimental deployments, and interoperability with existing technologies. We are also interested in papers that challenge the RINA principles and show limitations in its approach, disprove its claims or provide a simpler solution without compromising the benefits obtained by following the RINA architectural principles. Intended topics include but are not limited to: ● Comparison of RINA with other networking technologies that challenge its vision and principles (evolutions to IP-based technologies, NDN, ICN, SCION, etc.) ● Quality of Service in RINA ● Mobility, multi-homing and multicast ● Security: authentication, access control, confidentiality ● Routing in recursive layers ● Management of recursive networks ● Implications of RINA for AI-based network management ● High-performance RINA implementations via programmable hardware ● RINA scalability ● Policies for large-scale RINA DIFs ● Deployment scenarios for RINA ● RINA prototype implementations ● Deployment of 5G network slices enabling RINA networks ● Analysis of case studies showing benefits of RINA ● RINA for satellite constellations networking (LEO, MEO, GEO) ● Specific RINA policies and DIF designs for wireless networks ● Specific RINA policies and DIF designs for RINA in datacentre networks ● Specific RINA policies and DIF designs for RINA in IoT networks ● Specific RINA policies and DIF designs for RINA in service provider networks ● RINA applied to vehicular networking ● Specific RINA policies and DIF designs for RINA as a next generation virtual network overlay Supporting the requirements of large-scale decentralized applications (e.g. blockchains) *Submission instructions* *Main track*: Submitted papers must be original work, not under review at other journals/conferences, and may comprise a maximum of 6 A4 (210 mm x 297 mm) pages in 2-column IEEE conference style with a minimum font size of 10 pt. Papers should be submitted electronically using the EDAS online submission system. All accepted papers must be presented by one of the authors. *Submission URL*: https://edas.info/newPaper.php?c=26803 *Demo track*: Submitted papers must be original work, not under review at other journals/conferences, and may comprise a maximum of 4 A4 (210 mm x 297 mm) pages in 2-column IEEE conference style with a minimum font size of 10 pt. Papers should be submitted electronically using the EDAS online submission system. All accepted papers must be presented by one of the authors, who must run the demonstration at the workshop. *Submission URL*: https://edas.info/newPaper.php?c=26803 *Important dates* ● Paper submission deadline: November 29th 2018 ● Notification of acceptance: December 16th 2018 ● Camera-ready due: January 13th 2020 *Proceedings* Papers accepted for RINA 2020 will be included in the conference proceedings and IEEE Xplore. The IEEE reserves the right to remove any paper from IEEE Xplore if the paper is not presented at the workshop. *Workshop Co-Chairs* · Eduard Grasa, Fundació i2CAT, Spain · Peyman Teymoori, University of Oslo, Norway *Technical Program Committee* *TPC Co-Chairs* · Eduard Grasa, Fundació i2CAT, Spain · Peyman Teymoori, University of Oslo, Norway *Publicity Chair* · Anis Laouiti, Telecom SudParis, France *TPC Committee* · Steve Bunch, TRIA Network Systems LLC, USA · Diego Lopez, Telefonica, Spain · Antonio Marcos Alberti, Inatel, Brazil · Kevin Smith, Vodafone, UK · John Day, Boston University, USA · Lou Chitkushev, Boston University, USA · Kaniz Mahdi, Ciena, USA · Jordi Perelló, UPC, Spain · Davide Careglio, UPC, Spain · Sue Rudd, Strategy Analytics, USA · David Hayes, Simula Research Labs, Norway · Marco Bonola, University of Roma Tor Vergata, Italy · Giuseppe Bianchi, University of Roma Tor Vergata, Italy · Yuefeng Wang, Akamai, USA · David Hutchinson, Lancaster University, UK · Torsten Braun, Universitat Bern, Switzerland · Miquel Tarzan, Fundació i2CAT, Spain · Jairo López, Waseda University, Japan · Neil Davies, Predictable Network Solutions, UK · Peter Thompson, Predictable Network Solutions, UK · Miguel Ponce de Leon, Waterford Institute of Technology, Ireland · Anis Laouiti, Telecom SudParis, France · Sander Vrijders, VeroTech, Belgium

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[Call for papers] Workshop on Benchmarking Machine Learning Workloads on Emerging Hardware, 2020
by Murali Emani 26 Nov '19

26 Nov '19

CHALLENGE20- First International Workshop on Benchmarking Machine Learning Workloads on Emerging Hardware, 2020. To be held along with Third Conference on Machine Learning and Systems (MLSys) Austin, TX, March 2-4, 2020 https://memani1.github.io/challenge20 -------------- Overview: -------------- With evolving system architectures, hardware and software stack, diverse machine learning (ML) workloads, and data, it is important to understand how these components interact with each other. Well-defined benchmarking procedures help evaluate and reason the performance gains with ML workload to system mapping. We welcome all novel submissions in benchmarking machine learning workloads from all disciplines such as image and speech recognition, language processing, drug discovery, simulations and scientific applications. Key problems that we seek to address are: (i) which representative ML benchmarks cater to workloads seen in industry, national labs and interdisciplinary sciences; (ii) how to characterize the ML workloads based on their interaction with hardware; (iii) what novel aspects of hardware, such as heterogeneity in compute, memory, and bandwidth, will drive their adoption; (iv) performance modeling and projections to next generation hardware. Along with selected publications, the workshop program will also have experts in these research areas presenting their recent work and potential directions to pursue ----------------- Submissions: ----------------- We solicit both full papers (8-10 pages) and short/position papers (4-page) and are not double-blinded, the author names need to be included. The authors will need to mark any conflicts of interest with PC members at the submission site. The page limit includes figures, tables and appendices excluding references. Please use standard LaTeX or word ACM templates. All submissions will need to be made via EasyChair (https://easychair.org/conferences/?conf=challenge20) Each submission will be reviewed by at least three reviewers from the program committee. Papers will be reviewed for novelty, quality, technical strength and relevance to the workshop. ----------------- Proceedings: ------------------ We aim to publish all accepted papers in ACM digital library. ---------------------- Important Dates: ----------------------- Paper submission deadline: January 15, 2020 Author Notification: February 7, 2020 Camera-ready papers due: February 21, 2020 Workshop Date: (tentative) March 4, 2020 All deadlines are at midnight anywhere on earth (AoE), and are firm. ------------------------------- Organizing Committee: ------------------------------- Murali Emani, Argonne National Laboratory/ALCF (Email: memani(a)anl.gov) Tom St. John, Tesla Inc. (Email: tomstjohn617(a)gmail.com) --------------------------- Program Committee: ---------------------------- TBA

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CogArch 2020: The Fourth Workshop on Cognitive Architectures - Call for papers/prototype demonstrations
by Karthik V Swaminathan 26 Nov '19

26 Nov '19

CogArch 2020: The Fourth Workshop on Cognitive Architectures - Call for papers/prototype demonstrations The emerging new interest in artificial intelligence (AI) has led to a paradigm shift in the field of computer architecture. Architectures that focus on machine learning and neuromorphic computing are increasingly being adopted into the mainstream. The design of future processors is increasingly being predicated on metrics based on cognitive applications. The interplay between the development of state-of-the-art algorithms in cognitive sciences, computer vision, speech recognition and the design of the underlying system architectures has resulted in several cross-disciplinary advances. After highly successful editions of the Workshop on Cognitive Architectures in the past, in this year’s edition we expect to consolidate the many recent works in this field and provide concrete roadmaps as to what subsequent directions the research in this field should take. This workshop at HPCA 2020 proposes to bring together researchers and practitioners within systems architecture, computer vision, artificial intelligence and robotics to discuss the latest ideas, applications and commercialization strategies around the cognitive computing theme. In addition, it also aims to foster an interest in such emerging fields among industry and academic researchers alike. The primary focus is expected to be on driving towards a better understanding of key cognitive algorithms of interest and the allied architectural support issues. Of particular interest are application areas of mobile cognition, which may comprise of a distributed swarm of intelligent computing modules. This paradigm is relevant in the context of unmanned aerial vehicles and connected cars. Further, the rising investment by industry in designing IoT (Internet-of-Things) platforms, has resulted in several opportunities to build architectures that support capabilities such as intelligent data exchange and interaction with cloud, pattern matching, data analytics and other cognitive aspects to build truly transformative systems. Call for Papers Recent advances in architectures for AI have been instrumental in the development and deployment of autonomous systems, such as self- driving vehicles, and unmanned aerial vehicles. The Tesla FSD and Nvidia Xavier SoC are examples of commercial chips in the autonomous driving space with dedicated hardware units for processing AI algorithms. Next-generation processors in this domain are being envisioned as multi-agent systems that support swarm-based decision- making, as well as intelligent data exchange capabilities amongst each other or with a backing cloud server. The proliferation of mobile computing platforms, Internet-of-Things and cloud support features thereof have opened up exciting new opportunities for such real-time, mobile (distributed or swarm-driven) cognition. The CogArch workshop solicits formative ideas and new product offerings in this general space. Topics of interest include (but are not limited to): Algorithms in support of cognitive reasoning: recognition, intelligent search, diagnosis, inference and informed decision-making. Swarm intelligence and distributed architectural support; brain- inspired and neural computing architectures. Prototype demonstrations of state-of-the-art AI computing systems. Accelerators and micro-architectural support for artificial intelligence. Approaches to reduce training time and enable faster model delivery. Cloud-backed autonomics and mobile cognition: architectural and OS support thereof. Resilient design of distributed (swarm) mobile AI architectures. Reliability and safety considerations, and security against adversarial attacks in mobile AI architectures. Energy efficiency, battery life extension and endurance in mobile AI architectures. Case studies and real-life demonstrations/prototypes in specific application domains: e.g. smart homes, connected cars and UAV-driven commercial services, as well as applications of interest to defense and homeland security. The workshop shall consist of regular presentations and/or prototype demonstrations by authors of selected submissions. In addition, it will include invited keynotes by eminent researchers from industry and academia as well as interactive panel discussions to kindle further interest in these research topics. Submissions will be reviewed by a workshop Program Committee, in addition to the organizers. Submitted manuscripts must be in English of up to 2 pages (with same formatting guidelines as main conference) indicating the type of submission: regular presentation or prototype demonstration. Submissions should be sent to submissions(a)cogarch-workshop.org by December 6th, 2019. Further details can be found at http://cogarch-workshop.org. If you have questions regarding submission, please contact us: info(a)cogarch-workshop.org Organizers Vijay Janapa Reddi, Harvard University Augusto Vega, IBM Research Karthik Swaminathan, IBM Research Nandhini Chandramoorthy, IBM Research Alper Buyuktosunoglu, IBM Research Pradip Bose, IBM Research Important dates Submission deadline: December 6th, 2019 Notification: January 10th, 2020 Camera ready deadline: February 7th, 2020 Workshop: February 23rd, 2020 (Co-located with HPCA 2020)

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PMAM 2020 submission deadline extension
by Zhiyi Huang 25 Nov '19

25 Nov '19

The 2020 International Workshop on Programming Models and Applications for Multicores and Manycores will be co-located with the PPoPP 2020 conference in February 22, 2020, San Diego, California, USA Rapid advancements in multicore and chip-level multi-threading technologies open new challenges and make multicore systems a part of the computing landscape. From high-end servers to mobile phones, multicores and manycores are steadily entering every single aspect of the information technology. However, most programmers are trained in sequential programming, yet most existing parallel programming models are prone to errors such as data race and deadlock. Therefore, to fully utilize multicore and manycore hardware, parallel programming models that allow easy transition of sequential programs to parallel programs with good performance and enable development of error-free codes are urgently needed. This workshop is dedicated primarily to gather researchers and practitioners addressing the main challenges and share experiences in the emerging multicore and manycore software engineering and distributed programming paradigm. This workshop aims to provide a discussion forum for people interested in programming environments, models, tools and applications specifically designed for parallel multicore and manycore hardware environments. Selected best papers of PMAM will be considered for publication in a special issue of highly ranked journal. The program committee cordially invites any novel research ideas in (but not limited to) the following topics: programming models and systems for multicore, manycore, and clusters of multicore/manycore parallel and distributed machine learning and AI algorithms multicore and manycore software engineering parallel and distributed algorithms on GPU and multicore clusters parallel libraries and frameworks performance analysis, efficiency and effectiveness massively parallel processing on multicore/manycore systems and clusters automated parallelization and compilation techniques debugging and performance autotuning tools and techniques for multicore/manycore applications parallel algorithms, applications and benchmarks on multicore/manycore systems runtime power/energy management on multicore/manycore systems and clusters fault tolerance and resilience Proceedings All accepted papers will be published in the PMAM 2020 proceedings by the ACM Digital Library, and will be included in the Elsevier databases Scopus and Compendex (EI indexed). Selected best papers of PMAM will be considered for publication in a special issue of CC-PE. Important Dates Paper submission deadline: December 9, 2019 Notification of acceptance: January 15, 2020 Camera-ready papers due: February 1, 2020 Papers reporting original and unpublished research results and experience are solicited. All paper submissions will be handled electronically via EasyChair. http://www.easychair.org/conferences/?conf=pmam2020 Papers must not exceed 10 pages in standard ACM two-column conference format (preprint mode, with page number and the 9pt template). Authors must register and submit their paper through the online submission system. If you have problems accessing the system, e-mail your submission to: pmam2020 at cs dot otago dot ac dot nz For more details, please refer to: https://www.cs.otago.ac.nz/pmam2020/ For enquiries, please contact: pmam2020(a)cs.otago.ac.nz -- Zhiyi Huang Associate Professor Dept of Computer Science University of Otago Dunedin, New Zealand

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