December 2023 - hpc-announce - mailman3.cels.anl.gov

Call For Paper - HIPS@IPDPS24
by Lee, Seyong 30 Dec '23

30 Dec '23

HIPS 2024: The 29th International Workshop on High-Level Parallel Programming Models and Supportive Environments to be held in conjunction with IPDPS 2024 May 27-31, 2024 San Francisco, California, USA [Introduction] The 29th HIPS workshop, proposed as a full-day meeting at the IEEE IPDPS 2024 conference in San Francisco, California, USA, focuses on high-level programming of multiprocessors, compute clusters, and massively parallel machines. Like previous workshops in the series, which was established in 1996, this event will serve as a forum for research in the areas of parallel applications, language design, compilers, runtime systems, and programming tools. It provides a timely forum for scientists and engineers to present the latest ideas and findings in these rapidly changing fields. In our call for papers, we especially encouraged innovative approaches in the areas of emerging programming models for large-scale parallel systems and many-core architectures. An additional emphasis this year will be on post-von Neumann architectures and deep memories hierarchies to encourage new developments in programming models for HPC. [Topics of the workshop] Topics of interest to the HIPS workshop include but are not limited to: - High-level and domain-specific programming systems - Languages and compilers for post-Moore’s-Law (or Post Von Neumann) - Language/compiler support for AI/ML and Cybersecurity/Privacy (e.g., ML-based auto-tuning) - Task-based programming systems - (Scalable) programming tools and tools for power & performance analysis, modeling, monitoring, and debugging and core correctness - Compiler analysis and optimization techniques - OS and architectural support for parallel programming and debugging - Software and system support for extreme scalability including fault tolerance and power-aware HPC - Programming environments for heterogeneous multicore systems and accelerators such as GPUs and FPGAs - Solutions for programming paradigms for GPUs from different hardware vendors - Dynamism in applications and system resources - Performance portability - Efforts for improving the sustainability of scientific software - Languages and runtime support for multi-science/coupled codes, including but not limited to ensemble computing and uncertainty quantification - New programming languages and constructs for exploiting parallelism and locality - Higher-level programming support for quantum computing/quantum simulation [Important Dates] -Paper submission deadline: January 19, 2024 Anywhere on Earth (AoE) -Notification of acceptance: February 16, 2024 AoE -Camera-ready papers due: February 29, 2024 AoE -Workshop day: TBD (IPDPS24 will be from May 27 to 31, 2024) [Steering Committee] Rudolf Eigenmann, University of Delaware, USA Michael Gerndt, Technische Universität München, Germany Frank Mueller, North Carolina State University, USA Martin Schulz, Technische Universität München, Germany [Organizers (Contact us)] Seyong Lee, Oak Ridge National Laboratory, Oak Ridge, Tennessee, USA (lees2 at ornl.gov) Lena Oden, FernUniversität in Hagen, Germany (l.oden at fz-juelich.de) [Program Committee] Giorgis Georgakoudis, Lawrence Livermore National Laboratory, USA Konstantinos Parasyris, Lawrence Livermore National Laboratory, USA Miwako Tsuji, RIKEN Center for Computational Science, Japan Tomohiro Ueno, RIKEN Center for Computational Science, Japan Florina M. Ciorba, Universität Basel, Switzerland James Lin, Shanghai Jiao Tong University, China Balazs Gerofi, Intel, USA Nikela Papadopoulou, Chalmers University of Technology, Sweden Carina Haupt, Deutsches Zentrum für Luft- und Raumfahrt (DLR), Germany Christian Terboven, RWTH Aachen University, Germany Thorsten Hater, Jülich Supercomputing Center, Germany [Manuscript submission] Authors are invited to submit original papers in two separate tracks: - Full papers may not exceed 10 single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. The authors, if accepted, will have the opportunity to present their work during the workshop. - Short papers may not exceed 4 single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. The authors, if accepted, will have the opportunity to give a short presentation during the workshop. All submissions should be formatted according to the IPDPS paper style. Please submit papers through the IPDPS-HIPS Linklings site: https://ssl.linklings.net/conferences/ipdps/?page=Submit&id=HIPSWorkshopFul… [Proceedings] The accepted full papers will be published in the IPDPS 2024 Workshops proceedings by the IEEE Xplore Digital Library. (Short papers will not appear in the proceedings.) Presentation of an accepted paper at the conference is a requirement of publication. Any paper that is not presented at the conference will not be included in IEEE Xplore.

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CFP: IEEE SmartComp 2014@Osaka JAPAN June29-July02
by Hayato YAMANA 29 Dec '23

29 Dec '23

IEEE SmartComp2024 The 10th edition of the premier conference on smart computing, will be held in Osaka, Japan at the end of June 2024. https://smartcomp.w.waseda.jp/ == <<<<<<<Deadlines>>>>>>> Paper Submission: February 29, 2024 (Research Track and Industry Track) Acceptance Notification: April 5, 2024 Camera Ready (tentative): May 10, 2024 Conference: June 29 to July 2, 2024 All deadlines are Anywhere on Earth. == Paper Submission for Co-located workshops : March 31, 2024 == Smart computing is a multidisciplinary domain based on the synergistic influence of advances in sensor-based technologies, Internet of Things, cyber-physical systems, edge computing, big data analytics, machine learning, cognitive computing, ambient intelligence, and artificial intelligence. Applications of smart computing can be found in various societal domains, including transportation, energy, environmental protection, smart and connected communities, healthcare, industrial systems, and entertainment. Algorithmic and systems advancements of cloud computing, mobile and pervasive computing, sensor networking, and social computing are taking smart computing to a new level while improving our ways of living. SMARTCOMP 2024 welcomes novel, cutting-edge and creative research contributions. Authors are encouraged to discuss the importance, timeliness, and significance of their work as well as limitations, future opportunities and open research directions. <<<<<<<Main Research Track>>>>>>> SMARTCOMP 2024 solicits submissions that address the fundamental questions of smart computing, that is how to design and build scalable and reliable smart computing systems, and how to use computing technology for resource sustainability to improve the human experience. Topics of interest include - but are not limited to - the following: Emerging Smart Computing Paradigms Algorithms for Smart Computing AI and Machine Learning in Smart Computing Security, Privacy, and Trust in Smart Computing Smart and Usable Security and Privacy Fairness and Socio-technical Aspects of Smart Computing Middleware for Smart Systems Mobile and Ubiquitous Smart Systems, Wearable Computing and IoT Intelligent Cyber-Physical Systems Cloud, Edge, and Fog based Smart Computing Platforms Data Architectures and Analytics for Smart Computing Distributed Sensing and Computation Novel Communication Paradigms in Smart Computing Low Power Communication and Computing for Smart Systems Social Computing and Smart Systems Quantum Computing in Smart Systems Interdisciplinary Approaches to Smart Computing Appl. of Smart Computing, e.g. Smart Communities, Health, Industry Journal Fast Track Extended versions of selected high-quality papers accepted by IEEE SMARTCOMP 2024 will be considered for publication in Elsevier’s Pervasive and Mobile Computing journal (IF: 4.3). Submission Guidelines Paper submissions must be no longer than 8 pages (the page count limit includes the references list) and formatted according to the two-column IEEE proceedings template. All submitted papers that conform to these guidelines will be subject to peer reviews by Technical Program Committee members and other experts in the field. All presented papers will be published in the conference proceedings and submitted to the IEEEXplore Digital Library. SUBMISSION URL (paper registration from November 1st, 2023): https://edas.info/N31641 Research papers should be submitted to the Main Track section of the conference (check EDAS submission link above). Two additional pages for the camera ready version can be purchased after the paper review and selection. Technical Program Committee Co-Chairs Dario Bruneo, Univ. of Messina, Italy Dirk Pesch, Univ. College Cork, Ireland <<<<<<<Industry Track>>>>>>> In addition to the main research track, the conference invites innovative applications and advances in the industrial use of smart computing technology. The industry track will provide a forum to discuss novel ideas and emerging results, present innovative applications and tools, and bring about novel research questions, approaches, and directions with an industry focus. The conference industry track draws upon many industrial applications such as transportation, energy, environmental protection, resource management, healthcare, security, banking, entertainment, and social media. An important criterion for papers to be submitted to the Industry Track is the clear industrial association, either in the form of an extensive evaluation of research results in industrial use cases or the active participation of industry representatives as co-authors. Accepted papers will be published as part of a separate section of the main conference proceedings that highlights the Industry relevance of the submission. Topics Industry Track Topics include, but are not limited to, the following: Smart Cyber-Physical Environments and Energy / Water / Agriculture/ Transportation / Healthcare / Banking Infrastructure / … Security, Privacy, and Economics in Smart Environments Smart and Connected Communities across Cities Smart Computing Technologies Future Smart Computing Paradigms Smart Human-centric Environments, Health, Entertainment, and Social Activities Artificial Intelligence and Machine Learning for Smart Computing Industry-track submission guidelines SUBMISSION URL (paper registration from November 1st, 2023): https://edas.info/N31618 Industry track papers should be submitted in the Industry Track section (check EDAS submission link above) Also, two additional pages for camera ready version can be purchased after the paper review and selection. Potential contributors are encouraged to look at the other calls associated with the main conference. This includes calls for various workshops, PhD forum, work in progress, demonstrations and posters sessions. Industry Track Co-Chairs Kyoungsook Kim, AIST, Japan Eduard Marin, Telefonica Research, Spain <Submission Guidelines> Paper submissions must be no longer than 8 pages (the page count limit includes the references list) and formatted according to the two-column IEEE proceedings template. All submitted papers that conform to these guidelines will be subject to peer reviews by Technical Program Committee members and other experts in the field. All presented papers will be published in the conference proceedings and submitted to the IEEEXplore Digital Library. -- -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= Hayato YAMANA, / Prof. Waseda Univ. / yamana(a)waseda.jp Computer Science and Engineering, Waseda Univ., JAPAN Bld.51-11-05, 3-4-1 Okubo, Shinjuku, Tokyo 169-8555 JAPAN TEL: +81-3-5286-3503 Access: https://www.waseda.jp/fsci/en/access/ URL:http://www.yama.info.waseda.ac.jp/~yamana/

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[CFP - Reminder] ESSA Workshop at IEEE IPDPS 2024 - Submissions due January 25, 2024
by Sarah Neuwirth 29 Dec '23

29 Dec '23

**[Apologies if you receive multiple copies of this email]** ********************************************************************* Call for Papers ESSA 2024: The 5th Workshop on Extreme-Scale Storage and Analysis (Formerly High Performance Storage (HPS)) Held in conjunction with IEEE IPDPS 2024, San Francisco, CA, USA. Workshop Date: May 2024 (https://sites.google.com/view/essa-2024) ********************************************************************* We are organizing the fifth edition of the International Workshop on Extreme-Scale Storage and Analytics (ESSA) held in conjunction with IPDPS since 2020 (formerly High Performance Storage (HPS) in 2020 and 2021). Advances in storage are becoming increasingly critical because workloads on high performance computing (HPC) and cloud systems are producing and consuming more data than ever before, and the situation promises to only increase in future years. Additionally, the last decades have seen relatively few changes in the structure of parallel file systems, and limited interaction between the evolution of parallel file systems, e.g., Lustre, GPFS, and I/O support systems that take advantage of hierarchical storage layers, e.g., node local burst buffers. However, recently the community has seen a large uptick in innovations in data storage and processing systems as well as in I/O support software for several reasons: (1) Technology: The availability of an increasing number of persistent solid-state storage and persistent storage-class memory technologies that can replace either memory or disk are creating new opportunities for the structure of storage systems. (2) Performance requirements: Disk-based parallel file systems cannot satisfy the performance needs of high-end systems. However, it is not clear how solid-state storage and storage-class memory can best be used to achieve the needed performance, so new approaches for using solid-state storage and storage-class memory in HPC systems are being designed and evaluated. (3) Application evolution: Data analysis applications, including graph analytics and machine learning, are becoming increasingly important both for scientific computing and for commercial computing. I/O is often a major bottleneck for such applications, both in cloud and HPC environments – especially when fast turnaround or integration of heavy computation and analysis are required. Consequently, data storage, I/O and processing requirements are evolving, as complex workflows involving computation, analytics and learning emerge. (4) Infrastructure evolution: HPC technology will not only be deployed in dedicated supercomputing centers in the future. “Embedded HPC”, “HPC in the box”, “HPC in the loop”, “HPC in the cloud”, “HPC as a service”, and “near-to-real-time simulation” are concepts requiring new small-scale deployment environments for HPC. A federation of systems and functions with consistent mechanisms for managing I/O, storage, and data processing across all participating systems will be required to create what is called a “computing continuum”. (5) Virtualization and disaggregation: As virtualization and disaggregation become broadly used in cloud and HPC computing, the issue of virtualized storage has increasing importance and efforts will be needed to understand its implications for performance. Our goals in the ESSA Workshop are to bring together expert researchers and developers in data-related areas such as storage, I/O, processing and analytics on extreme scale infrastructures including HPC systems, clouds, edge systems or hybrid combinations of these, to discuss advances and possible solutions to the new challenges we face. We expect the ESSA Workshop to result in lively interactions over a wide range of interesting topics. Topics of interest include, but are not limited to: - Extreme-scale storage systems (on high-end HPC infrastructures, clouds, or hybrid combinations of them) - Extreme-scale parallel and distributed storage architectures - The synergy between different storage models (POSIX file system, object storage, key-value, row-oriented, and column-oriented databases) - Structures and interfaces for leveraging persistent solid-state storage and storage-class memory - High-performance I/O libraries and services - I/O performance in extreme-scale systems and applications (HPC/clouds/edge) - Storage and data processing architectures and systems for hybrid HPC/cloud/edge infrastructures, in support of complex workflows potentially combining simulation and analytics - Integrating computation into the memory and storage hierarchy to facilitate in-situ and in-transit data processing - I/O characterization and data processing techniques for application workloads relying on extreme-scale parallel/distributed machine-learning/deep learning - Tools and techniques for managing data movement among compute and data intensive components - Data reduction and compression - Failure and recovery of extreme-scale storage systems - Benchmarks and performance tools for extreme-scale I/O - Language and library support for data-centric computing - Storage virtualization and disaggregation - Ephemeral storage media and consistency optimizations - Storage architectures and systems for scalable stream-based processing - Study cases of I/O services and data processing architectures in support of various application domains (bioinformatics, scientific simulations, large observatories, experimental facilities, etc.) ================================ Submission Guidelines ================================ The workshop will accept traditional research papers (Page limit: 8 pages) for in-depth topics and short papers (Page limit: 5 pages) for work in progress on hot topics. Papers should present original research and provide sufficient background material to make them accessible to the broader community. Papers with 5 pages or less are reviewed as Short/work-in-progress papers. Short papers must have 4 pages to be published in the IEEE Digital Library. Formatting: Single-spaced double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style), including figures, tables, and references. The submitted manuscripts should include author names and affiliations. The IEEE conference style templates for MS Word and LaTeX provided by IEEE eXpress Conference Publishing are available here: https://www.ieee.org/conferences/publishing/templates.html . All papers must be in English. We use single-blind reviewing process, so please keep the authors names, publications, etc., in the text. Papers will be peer-reviewed, and accepted papers will be published in the workshop proceedings as part of the IEEE Digital Library. Submission link (login required, opening soon): https://ssl.linklings.net/conferences/ipdps/?page=Submit&id=ESSAWorkshopFul… ================================ Important Dates ================================ Please note: All deadlines are midnight Anywhere on Earth - Abstract submission (optional) deadline: January 18, 2024 - Paper submission deadline: January 25, 2024 - Acceptance notification: February 15, 2024 - Camera-ready deadline: February 29, 2024 - Workshop date: May 2024 (day TBA) ================================ Workshop Committees ================================ Workshop Chairs: - Chair: François Tessier, Inria, France - Co-Chair: Weikuan Yu, Florida State University, USA Program Chairs: - Chair: Sarah Neuwirth, Johannes Gutenberg University Mainz, Germany - Co-Chair: Arnab K. Paul, BITS Pilani, K K Birla Goa Campus, India Web Chair: - Chair: Lenny Guo, Pacific Northwest National Laboratory, Richmond, USA Publicity Chair: - Chair: Chen Wang, Lawrence Livermore National Laboratory, Livermore, USA Steering Committee: - Gabriel Antoniu , INRIA Rennes - Franck Cappello, Argonne National Laboratory - Tony Cortes, Barcelona Supercomputing Center - Kathryn Mohror, Lawrence Livermore National Laboratory - Kento Sato, RIKEN - Marc Snir, University of Illinois at Urbana-Champaign - Weikuan Yu, Florida State University Program Committee: - Tyler Allen, University of North Carolina at Charlotte, USA - Oceane Bel, Pacific Northwest National Laboratory (PNNL), USA - Sajal Dash, Oak Ridge National Laboratory (ORNL), USA - Matthieu Dorier, Argonne National Laboratory (ANL), USA - Anna Fuchs, University of Hamburg, Germany - Hariharan Devarajan, Lawrence Livermore National Laboratory (LLNL), USA - Adrian Jackson, The University of Edinburgh, UK - Hideyuki Kawashima, Keio University, Japan - Radita Liem, RWTH Aachen University, Germany - Glenn K. Lockwood, Microsoft, USA - Xiaoyi Lu, University of California Merced, USA - Osamu Tatebe, University of Tsukuba, Japan - Luan Teylo, National Institute for Research in Digital Science and Technology (Inria), France - Marc-André Vef, Johannes Gutenberg University Mainz, Germany - Lipeng Wan, Georgia State University, USA - Dongfang Zhao, University of Washington, USA -- ----------------------------------------------------------------------- Prof. Dr. Sarah M. Neuwirth Johannes Gutenberg University Mainz High Performance Computing and its Applications Anselm-Franz-von-Bentzelweg 12 55099 Mainz | Germany Phone: +49 6131 39 23643 Email: neuwirth(a)uni-mainz.de Website: https://www.hpca-group.de/ -----------------------------------------------------------------------

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[deadline extended] SIoTEc 2024 - 5th edition of IEEE Workshop on Secure IoT, Edge and Cloud systems
by angalletta＠ieee.org 27 Dec '23

27 Dec '23

Dear users of Hpc-Announce mailing list, Due to many requests, the regular papers submission deadline of SIoTEc 2024 has been extended to Jan 24th, 2024. To submit a paper, please, use the following link: https://cmt3.research.microsoft.com/SIOTEC2024/Submission/Index =========================================================================== SIoTEc 2024 - 4th edition of IEEE Workshop on Secure IoT, Edge and Cloud systems Philadelphia, USA May 6th, 2024 - https://siotec.netsons.org/ in conjunction with the 24th IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2024) =========================================================================== MISSION: ------------------------------------------------------------------------------ The Cloud/Edge paradigm fosters the deployment of digital services over multiple physical (both private and public) infrastructures even across different administrative boundaries. In its turn, the IoT advent has determined the proliferation of smart devices connected to the Internet and injecting into it a vast amount of data that may traverse several network boundaries and undergo many computational stages before they get consumed. If, on the one hand, the benefits brought by these technologies are well known, it is clear as well that, in the envisaged scenario, the exposure of data, services and infrastructures to malicious attacks has definitely grown. Even a single breach on any of the links of the data-service-infrastructure chain may seriously compromise the security of the end-user application. With such a wide attack surface, security must definitely approached in a holistic way and addressed in any layer where concerns may potentially arise. The workshop solicits novel and innovative ideas, proposals, positions and best practices that address the modelling, design, implementation, and enforcement of the security in Cloud/Edge/IoT environments. TOPICS: ------------------------------------------------------------------------------ - Blockchain-based tools and services - Data security across multiple domains and countries - Federated IoT, Edge and Cloud systems - Security in Osmotic Computing - Security on Cyber-physical systems - Anonymous and certified communications - Metrics and performance of secure interdomain protocols - Attack detection and prevention - Authentication protocols and key management - Availability and survivability of secure services and systems - Biometric security - Trust models and security modeling in Cloud/Edge/IoT scenarios - Security and privacy in the cloud and fog/edge infrastructure, services and storage - Machine/deep learning applied to security applications - Emerging and disruptive technologies for security, privacy, trust and forensics - Security systems and protocols for Drones - Drone communication and communication security - Security in e-health - Security in Smart cities - Security in Networks including SDN - Data splitting and secret sharing - Security in Federated Learning The use of Soft Computing/Computational Intelligence methods in facing problems in the above topics is highly welcome, although not compulsory. PAPER SUBMISSION: ------------------------------------------------------------------------------ Authors are invited to submit their papers written in English in IEEE double-column format (IEEE standard conference templates). Papers can be either full, with a maximum length of eight (8) printed pages, or short, with a maximum length of four (4) printed pages. In both cases, the number of pages includes figures, tables and references. Submissions should contain original material and not be previously published, or currently submitted for consideration elsewhere. All papers will be reviewed for scientific quality by the Technical Program Committee. All papers should be submitted via easychair using the following link https://cmt3.research.microsoft.com/SIOTEC2024/Submission/Index Paper submission implies the willingness of at least one author to register, at the regular rate (non-student), and present the paper. The Workshop Proceedings will be part of the CCGrid 2024 Proceedings and will be submitted for inclusion in IEEE Xplore Digital Library. The IEEE SIoTEC Workshop is using the Easychair Conference Management System to manage the paper submission process. BEST PAPER AWARD: ------------------------------------------------------------------------------ A "Best Paper Award" Certificate will be conferred on the author(s) of a paper presented at the workshop, selected by the Chairs based on scientific significance, originality and outstanding technical quality of the paper, as assessed also by the evaluations of the members of the Program Committee. SPECIAL ISSUES: ------------------------------------------------------------------------------ Highly top rated papers from the Siotec 2022 conference will be invited for submission of extended version for publication in one of the following special issues: TBA IMPORTANT DATES: ------------------------------------------------------------------------------ Submission deadline: Jan 24th, 2024 (extended) Notification of paper acceptance: Feb 23rd, 2024 Submission of camera-ready papers: Mar 4th, 2024 VENUE: ------------------------------------------------------------------------------ Philadelphia, USA CHAIRS: ------------------------------------------------------------------------------ Prof. Javid Taheri, Queen's University Belfast Dr. Annamaria Ficara, University of Messina Dr. Giuseppe Di Modica, University of Bologna Dr. Antonino Galletta, University of Messina FOR ANY OTHER INFORMATION https://siotec.netsons.org/ or email us at siotec(a)googlegroups.com

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Call for Paper - ExHET@PPoPP'24
by Lee, Seyong 27 Dec '23

27 Dec '23

ExHET 2024: The 3rd International Workshop on Extreme Heterogeneity Solutions to be held in conjunction with PPoPP 2024 March 3, 2024 Edinburgh, United Kingdom [Introduction] While computing technologies have remained relatively stable for nearly two decades, new architectural features, such as specialized hardware, heterogeneous cores, deep memory hierarchies, and near-memory processing, have emerged as possible solutions to address the concerns of energy efficiency, manufacturability, and cost. However, we expect this ‘golden age’ of architectural change to lead to extreme heterogeneity and it will have a major impact on software systems and applications. In this upcoming exascale and extreme heterogeneity era, it will be critical to explore new software approaches that will enable us to effectively exploit this diverse hardware to advance science, the next-generation systems with heterogeneous elements will need to accommodate complex workflows. This is mainly due to the many forms of heterogeneous accelerators (no longer just GPU accelerators) in this heterogeneous era, and the need to map different parts of an application onto elements most appropriate for that application component. [Objectives, scope, and topics of the workshop] The goal of this workshop is to provide a forum to discuss new and emerging solutions to address these important challenges from the upcoming extreme heterogeneity era. Papers are being sought on many aspects of heterogeneous computing including (but not limited to): Heterogeneous Programming Environments and Runtime Systems --Programming models and systems --Parallel resource management on heterogeneous systems --Automated parallelization and compiler techniques (Autotuning) Heterogeneous Solutions for HPC and Scientific Applications --Parallel and distributed algorithms --Parallel libraries and frameworks --Parallel processing on heterogeneous systems Heterogeneous (including Non-von Neuman) Architectures --Power/energy management --Heterogeneous architectures for emerging application domains --Architecture designs including Non-von Neuman architectures, memory, and interconnection Reliability/Benchmarking/Measurements --Debugging, performance tools and techniques --Fault tolerance and resilience --Application/hardware benchmarks [Important Dates] -Paper submission deadline: December 29, 2023 -Notification of acceptance: January 12, 2024 -Camera-ready papers due: February 16, 2024 -Workshop day: March 3, 2024 [Steering Committee] Jeffrey S. Vetter, Oak Ridge National Laboratory, USA Olivier Aumage, INRIA, France Manuel Prieto, University Complutense of Madrid, Spain Hartwig Anzt, ICL at UTK, USA Stanimire Tomov, University of Tennessee at Knoxville, USA Antonio J. Pena, Barcelona Supercomputing Center, Spain, Spain [Organizers (Contact us)] Pedro Valero-Lara (co-chair) Oak Ridge National Laboratory, USA valerolarap at ornl.gov Seyong Lee (co-chair) Oak Ridge National Laboratory, USA lees2 at ornl.gov Gokcen Kestor (co-chair) Pacific Northwest National Laboratory, University of California Merced, USA gokcen.kestor at pnnl.gov Monil Mohammad Alaul Haque (proceeding chair) Oak Ridge National Laboratory, USA monilm at ornl.gov Jose Manuel Monsalve Diaz (publicity chair) Argonne National Laboratory, USA jmonsalvediaz at ornl.gov Simon Garcia de Gonzalo (web chair) Sandia National Laboratory, USA simgarc at ornl.gov [Programme Committee] William F. Godoy, Oak Ridge National Laboratory, USA Guray Ozen, Google, USA Juan Gomez-Luna, ETH Zurich, Switzerland Jaewoong Sim, Seoul National University, Korea Ali Akoglu, Arizona State University, USA Naoya Maruyama, NVIDIA, USA Jose Manuel Monsalve, Argonne National Laboratory, USA Monil Mohammad Alaul Haque, Oak Ridge National Laboratory, USA Het Mankad, Carnegie Mellon University, USA Simon Garcia de Gonzalo, Sandia National Laboratory, USA Marc Gonzalez-Tallada, Universitat Politecnica de Catalonia, Spain [Manuscript submission] Papers reporting original and unpublished research results and experience are solicited. Papers must not exceed 6 pages in standard ACM two-column conference format. ACM templates for Microsoft Word and LaTeX are available here. All paper submissions will be handled electronically via EasyChair: https://easychair.org/conferences/?conf=exhet2024 [Proceedings] All accepted papers will be published in the ExHET-PPoPP Workshops 2024 proceedings by the ACM Digital Library. [Best Paper Award] The Best Paper Award will be selected on the basis of explicit recommendations of the reviewers and their scoring towards the paper’s originality and quality. [Special Issue Journal] Selected best papers of ExHET will be considered for publication in a special issue of the international journal Applied Sciences (IF: 2.838).

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CALL FOR PAPERS - WiMob 2024 in Paris, France
by Mostafa Fouda 24 Dec '23

24 Dec '23

[Apologies if you receive multiple copies of this message] ===================================== CALL FOR PAPERS ************************************************************* The 20th International Conference on Wireless and Mobile Computing, Networking and Communications (WiMob 2024), October 9-11, 2024 in Paris, France. http://wimob.org/wimob2024/ ************************************************************* !**** IEEE Communications Society sponsorship under approval ****! !**** The papers will be included in the conference proceedings, published by IEEE CS Press (IEEE Xplore) and indexed by Scopus and Ei Compendex. The WiMob conference is an international forum for the exchange of experience and knowledge among researchers and developers concerned with wireless and mobile technology. For seventeen years, the International WiMob conference has provided unique opportunities for researchers to interact, share new results, show live demonstrations, and discuss emerging directions in - Wireless Communication, - Wireless Networking, Mobility and Nomadicity, - Ubiquitous Computing, Services and Applications, - Green and sustainable communications and network computing and - Security on Wireless and mobile Networks. WiMob 2024 is soliciting high quality technical papers addressing research challenges in the areas of wireless communications, wireless networking, mobility, nomadicity, ubiquitous computing, services and applications. Papers should present original work validated via analysis, simulation or experimentation. Practical experiences and Testbed trials also are welcome. WiMob 2024 will host FIVE parallel symposia: 1. Wireless Communications (WC) 2. Wireless Networking, Mobility and Nomadicity (WNMN) 3. Ubiquitous Computing, Services and Applications (UCSA) 4. Green and Sustainable Communications and Network computing (GSCN) 5. Security on Wireless and Mobile Networks (SWMN) For the detailed topics, you can refer to WiMob 2024 web site. Important Dates - Submissions Date: May 15, 2024 - Notifications Date: July 30, 2024 - Camera ready Date: September 9, 2024 - Registrations for Authors: September 9, 2024 INSTRUCTIONS FOR PAPER SUBMISSION Authors are required to submit fully formatted, original papers (PDF), with graphs, images, and other special areas arranged as intended for the final publication. Papers should be written in English conforming to the IEEE standard conference format (two-column, 10 pt font, etc., including figures, tables, and references). The review submissions are limited to six pages, with two additional pages for final papers (additional charges may apply for additional pages). Conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases. Each accepted paper must be presented at the conference by one of the co-authors or a third party, otherwise it will not be indexed and archived through IEEE Xplore. Only timely submissions through EDAS will be accepted. To submit your paper, please, click here: https://edas.info/newPaper.php?c=30581 For more details, please visit the WiMob 2024 official website (http://wimob.org/wimob2024) and Facebook page for WiMob 2024: https://www.facebook.com/profile.php?id=100088392632437 ACCEPTED PAPERS Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore's scope and quality requirements. Best regards, -------------- Mostafa Fouda Associate Professor Department of Electrical and Computer Engineering, Idaho State University, ID, USA IEEE Senior Member Editor of IEEE Internet of Things Journal (Impact Factor: 10.6) Editor of IEEE Transactions on Vehicular Technology (Impact Factor: 6.8) Associate Editor of IEEE Access (Impact Factor: 3.9) http://www.mostafafouda.com

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ICC 2024 Workshop on Cooperative Communications and Computations in Space-Air-Ground-Sea Integrated Networks (SAGSINs)
by Mostafa Fouda 23 Dec '23

23 Dec '23

Dear colleagues, Apologies for possible cross-posting. You are invited to submit your original research papers to the IEEE ICC 2024 Workshop on Cooperative Communications and Computations in Space-Air-Ground-Sea Integrated Networks (SAGSINs) located in Denver, CO, USA, from 9 to 13 June 2024. Important Dates ------------------ Submission Deadline: 20 January 2024 Authors Notification: 6 March 2024 Final Manuscript Due: 15 March 2024 Registration for accepted papers: 15 March 2024 Conference/Workshop dates: 9 to 13 June 2024 Workshop Chairs ------------------ Bomin Mao, Northwestern Polytechnical University, China Mostafa Fouda, Idaho State University, US Fengxiao Tang, Central South University, China Scope and Topics of Interests -------------------------------- Space-Air-Ground-Sea Integrated Networks (SAGSINs) have been widely recognized as future paradigm to provide seamless and diversified network connections. However, there still exist many limitations and challenges remaining to be solved to improve the performance and security protection. The ultra density and high dynamics of the emerging Low Earth Orbit (LEO) satellite constellations pose significant challenges for the access, networking, routing, and resource allocation. Moreover, the heterogeneous hardware and different communication environment complicate the management and optimization of SAGSINs. Furthermore, the characteristics of terrestrial services including diversified requirements, uneven distribution, and high mobility make the End-to-End service provision more complex. To address these issues, the cooperative communication and computation have been studied widely with the techniques of Software Defined Networking (SDN) and network slicing. And Free Space Optical (FSO) communications have been considered as the important solution to improve the transmission quality, while Artificial Intelligence (AI) can effectively address the complex network management and optimizations. To improve the reliability and effectiveness of the developed strategies, digital twin has been adopted for simulations. This workshop hopes to bring researchers from academic and industry together for technical discussion on the fundamental and practical solutions to the challenges of qualified communication and computation service provision in SAGSINs. The topics of interests include, but are not limited to: - Design and analysis of the future SAGSIN architecture - Deployment of satellites, aerial vehicles, and terrestrial stations for seamless coverage - Network access techniques for multi-mode terminals in future SAGSINs - Handover strategy for continuous and qualified data transmissions in SAGSINs - Spectrum management and engineering in SAGSINs - Terahertz (THz) and FSO communications for space networks - Routing and switching protocol design for future SAGSINs - Cooperative End-to-End (E2E) data transmission and processing - Advanced SDN and network slicing techniques for SAGSINs - Hierarchical computing and caching techniques in SAGSINs - AI-based performance optimizations for SAGSINs - Digital twin-based simulation platform design - Security and privacy issues in cooperative communications and computations Submission Instructions -------------------------- All submissions must be written in English in the standard IEEE two-column conference format and are limited to a maximum paper length of six (6) printed pages (10-point font) including figures and references. EDAS is configured to not permit the uploading of review manuscripts that exceed 6 pages. Once accepted, the final manuscript may have a 7th page, but such papers will incur an overlength page charge of US$100. Paper submission Link ------------------------ https://ws32icc2024workshop-cccsagsin.edas.info/ Workshop website: --------------------- WS32: Workshop on Cooperative Communications and Computations in Space-Air-Ground-Sea Integrated Networks https://icc2024.ieee-icc.org/workshop/ws-32-workshop-cooperative-communicat… Best regards, -------------- Mostafa Fouda Associate Professor Department of Electrical and Computer Engineering, Idaho State University, ID, USA IEEE Senior Member Editor of IEEE Internet of Things Journal (Impact Factor: 10.6) Editor of IEEE Transactions on Vehicular Technology (Impact Factor: 6.8) Associate Editor of IEEE Access (Impact Factor: 3.9) http://www.mostafafouda.com

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The Third International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC)
by Artur Podobas 23 Dec '23

23 Dec '23

The Third International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC'24) ----------------------- GENERAL INFORMATION ------------------------- CGRA4HPC 2024 will be held in conjunction with IPDPS 2024 Where: San Francisco, CA, USA Website: http://cgra4hpc.podobas.net/ Submission Link: https://ssl.linklings.net/conferences/ipdps/?page=Submit&id=CGRA4HPCWorksho… Important Deadlines Paper submission: February 1st, 2024 Paper notification: February 26th, 2024 Camera-ready due: March 15th, 2024 -------------------------- DESCRIPTION ------------------------------ Coarse-grained reconfigurable arrays (CGRAs) are programmable logic devices that offer plasticity/reconfigurability, albeit at a coarse-grained (word-configurable) level in comparison to fine-grained FPGAs. Such reconfigurability allows the silicon to be specialized towards a particular application in order to reduce data movement and improve performance and energy efficiency. Unlike their cousins, the Field-Programmable Gate Arrays (FPGAs), CGRAs provide reconfigurable Arithmetic Logic Units (ALUs) and a highly specialized yet versatile data path. This ``coarsening'' of reconfiguration allows CGRAs to achieve a significant (custom ASIC-like) reduction in power consumption and increase in operating frequency compared to FPGAs. At the same time, they remedy and overcome the expensive von Neumann (instruction-decoding) overhead that traditional general-purpose processors (CPUs) suffer from. In short, CGRAs strike a seemingly perfect balance between the reconfigurability of FPGAs and the performance of CPUs, with power consumption characteristics closer to custom ASICs. The International Workshop on Coarse-Grained Reconfigurable Architectures for High-Performance Computing (CGRA4HPC) aspires to provide a recurring forum for HPC experts, users and CGRA hardware researchers from academia or industry to come together and discuss state-of-the-art CGRA research for use in emerging HPC systems. ----------------------- TOPICS OF INTEREST ------------------------- Topics of interest include (but are not limited to): * CGRA Hardware and Architectures - Novel high-performance CGRA architectures for use in HPC - Energy-efficient architectures (incl. asynchronous/clockless CGRAs, power-consumption optimizations, etc.) * Hybrid Processor/CGRA Technology - Software-programmable CGRAs (e.g., Xilinx ACAP Versal) - Processors with a tightly interconnected CGRA subsystem - Combination of CGRAs and other emerging post-Moore models (e.g., neuromorphic systems) * Programming Models, Compilers, and Middleware - Parallel programming language support for programming CGRA architectures (e.g., supporting OpenMP or CUDA/HIP for programming CGRA architectures) - Compilation strategies, algorithms, and methods for mapping computations and applications onto modern CGRA architectures - Smart middleware and runtime systems for support of CGRAs, including multi-CGRA systems for HPC - The use of CGRA frameworks (e.g., CGRA-ME and OpenCGRA) to generate and customize architectures * Use-Cases and Experiments - Experience in porting scientific kernels and applications to state-of-the-art CGRAs (e.g., weather/climate codes, CFD, MD, etc.) - Machine Learning applications and case studies, performance and power-efficiency comparisons between traditional systems (CPUs/GPUs) and CGRAs * CGRAs and Generative Artificial Intelligence (NEW for CGRA4HPC'24) - New emerging CGRA-like architectures for Generative AI - Case studies and evaluations of CGRAs for (Generative) AI -------------------------- SUBMISSION ------------------------------ We welcome authors to contribute full-length research papers on the topics of interest described above. Contributions should be unpublished and not for consideration in other venues. We will adopt a single-blind review process for all papers. Papers should not exceed eight (8) single-spaced pages, formatted in double-column pages using 10-point size font on 8.5x11 inch pages (IEEE conference style). Accepted papers will be included in the workshop proceedings, which will be distributed at the conference and are submitted for inclusion in the IEEE Xplore Digital Library after the conference. We also welcome presentations on new and emerging CGRA technologies from industry and startups. These will be presented at a special lightning session in the workshop. Please contact the workshop organizers (podobas(a)kth.se) if you are interested in participating in this event. ----------------------- ORGANIZATION ------------------------- ORGANIZERS: Artur Podobas (KTH, Sweden) Kentaro Sano (RIKEN, Japan) Jason Anderson (University of Toronto, Canada) PROGRAM COMMITTEE: Ahmed Hemani (KTH, Sweden) Ahsan Javed Awan (Ericsson, Sweden) Boma Adhi (RIKEN, Japan) Cheng Tan (Microsoft, USA) Jens Domke (RIKEN, Japan) Lingli Wang (Fudan University, China) Markus Weinhardt (HS-Osnabrueck, Germany) Nakashima Yasuhiko (NAIST, Japan) Takuya Kojima (Univ. of Tokyo, Japan)

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CFP for BID'24@ICPE’24 (submission DL: 1. Feb.); Remote presentation possible
by Tom Lin 23 Dec '23

23 Dec '23

WORKSHOP SCOPE AND TOPIC Recent general adoption of AI and machine learning has motivated migration of HPC workloads to cloud data centres, and there is a growing interest by the community on performance evaluation in this area, especially for end-to-end workflows. In addition to traditional performance benchmarking and high performance system evaluation (including absolute performance, energy efficiency), as well as configuration optimizations, this workshop will discuss issues that are of particular importance in commercial HPC. Benchmarking has typically involved running specific workloads that are reflective of typical HPC workloads, yet with growing diversity of workloads, theoretical performance modelling is also of interest to allow for performance prediction given a minimal set of measurements. We invite novel, unpublished research paper submission within the scope of this workshop. Paper submission topics include, but are not limited to, the following areas: * Multi-, many-core CPUs, GPUs, accelerators, heterogeneous system evaluation * Performance, power, efficiency, and cost analysis * HPC, data centre, and cloud workloads and benchmarks * System, workload, topology, and workflow configuration/optimization SUBMISSIONS * Full papers: Up to 8 pages incl. references. (Inclusion of artefact evaluation/description appendix is encouraged and does not count towards the page limit.) * Submission details and the link to the submission website are posted on our workshop website https://parallel.computer/ PROCEEDINGS All accepted papers will be indexed and published in the ACM Digital Library after the workshop as part of the ICPE’24’s workshop track. SCHEDULE * Submission deadline: 1. February 2024 (23:59 AoE) * Author notification: 1. March 2024 * Camera ready deadline: 7. March 2024 (23:59 AoE) * Workshop date: 7-11. May 2024 ATTENDING BID’24 is part of the workshop track of ICPE’24 (https://icpe2024.spec.org) We will support presenters with travel restrictions by setting up a way to present remotely. However, regular registration fees, as stated on the ICPE website, will still apply. Workshop Chairs * Wei-Chen (Tom) Lin (HPC Research Group, University of Bristol, UK) * Jens Domke (RIKEN Center for Computational Science, Japan) Industrial Panel Chairs * TBD Program Committee * Aksel Alpay (Universität Heidelberg) * Aleksandar Ilic (Universidade de Lisboa) * Andrey Alekseenko (KTH Royal Institute of Technology) * Filippo Spiga (NVIDIA) * Swapna Raj (NVIDIA) * Joseph Schuchart (University of Tennessee) * Mustafa Abduljabbar (Ohio State University) * Mubarak Ojewale (KAUST) * Ravi Reddy Manumachu (University College Dublin) * Tom Deakin (University of Bristol) Advisory Committee * Samar Aseeri (King Abdullah University of Science and Technology, Saudi Arabia) * Juan (Jenny) Chen (National University of Defense Technology, China) * Benson Muite (Kichakato Kizito, Kenya) Questions/comments: chairs2024(a)parallel.computer

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ARCS 2024 CfP: HPC - Challenges for Sustainable Computing
by Lars Bauer 22 Dec '23

22 Dec '23

========================================================================= C A L L F O R P A P E R S -- A R C S 2 0 2 4 37th GI/ITG International Conference on Architecture of Computing Systems May 14-16, 2024, Potsdam, Germany https://arcs-conference.org ========================================================================= THIS YEAR’S FOCUS: *HPC - Challenges for Sustainable Computing* The ARCS conferences series has over 36 years of tradition reporting leading edge research in computer architecture and operating systems. High performance computing represents an important tool for tackling climate change. In many other HPC application fields, the need for more high computing power has increased enormously in recent years, especially due to the high demand of AI-specific workloads. The operation of correspondingly powerful computing systems therefore represents an increasing problem in terms of energy requirements and the associated CO2 emissions. HPC is therefore not only part of the solution to tackling climate change, but also part of the overall problem. Heterogeneous computer architectures promise a significant increase in the energy efficiency of HPC systems. The selection of different accelerator architectures can contribute significantly to increasing efficiency, but there is currently a lack of appropriate concepts for their seamless and scalable integration, as well as the support through appropriate programming models. The focus of the ARCS’24 conference will be on novel accelerator architectures, which are suited for the integration into HPC systems. This includes fine and coarse grain reconfigurable architectures as well as new ideas for their integration to achieve higher energy efficiency as typical homogeneous architectures. In addition, the topics cover HPC-specific research at the level of computer architec- tures, runtime and operating systems, design tools and HPC programming models and algorithms. In addition to the main conference, ARCS will host special tracks on Organic Computing and Dependability and Fault Tolerance. The proceedings of ARCS 2024 will be published in the Springer Lecture Notes on Computer Science (LNCS) series. A best paper and best presentation award will be presented at the conference. *Important Dates* ========================================================================= * Paper submission deadline: February 29, 2024 * Notification of acceptance: March 28, 2024 * Camera-ready papers: May 2, 2024 * Conference (in Potsdam, Germany): May 14 – 16, 2024 *Topics of Interest* ========================================================================= Paper submission: Authors are invited to submit original, unpublished research papers on one or more of the following topics: **Hardware Architectures** * HPC-workload specific accelerator architectures * Reconfigurable architectures * Advanced computing architectures * System-on-chip * Distributed systems * High performance systems * Heterogeneous multi- and many-core architectures * Architectures for real-time and mixed-criticality systems * Coarse- and fine-grained reconfigurable architectures * Flexible I/O support * Advanced computing architectures * Using new non-volatile memory for energy-efficient architectures * New smart network technologies (e.g. SmartNICs, SmartSwitches) **Programming Models and Runtime Environments** * HPC programming models for heterogeneous computing * Tools to monitor and to optimize the power consumption of HPC architecture * Operating systems, programming models, algorithms, and data structures for heterogeneous HPC architectures * Operating systems, hypervisors and middleware for homogeneous and heterogeneous multi-/many-core computing platforms * System management including but not limited to scheduling, memory management, power/thermal management, and RTOS * Domain-specific languages and programming models * Architecture specific code generation and optimization * Architectural simulation **Cross-sectional Topics** * Near-memory and in-memory computing * Memory and network compression technologies * Organic computing * Pervasive systems * Autonomous systems * Approximate Computing * Mixed-criticality systems * Support for safety and security * Hardware in the loop simulations *Submission guidelines* ========================================================================= Submissions should be done through the link that is provided on the conference website https://easychair.org/conferences/?conf=arcs2024. Papers must be submitted in PDF format. They should be formatted according to Springer LNCS style (see: https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu…) and must not exceed 15 pages, including references and figures. *Organizers* ========================================================================= General Chairs Dietmar Fey, Friedrich-Alexander-Universität Erlangen-Nürnberg, Germany Benno Stabernack, Universität Potsdam / Fraunhofer Heinrich Hertz Institut Program Chairs Stefan Lankes, RWTH Aachen University, Aachen, Germany Mathias Pacher, Goethe-University Frankfurt, Frankfurt am Main, Germany Proceedings Chair Thilo Pionteck, Magdeburg University, Germany Publicity and Web Chair Lars Bauer, Karlsruhe Institute of Technology (KIT), Germany https://arcs-conference.org

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