July 2016 - hpc-announce - mailman3.cels.anl.gov

[SC16 Workshop]-CFP: Accelerator Programming using Directives (WACCPD) + Best Paper AWARD
by Sunita Chandrasekaran 20 Jul '16

20 Jul '16

Third Workshop on Accelerator Programming using Directives (WACCPD) http://waccpd.org/ In cooperation with ACM SIGHPC Monday, November 14, 2016 co-located with SC16: The International Conference for High Performance Computing, Networking, Storage and Analysis <http://sc16.supercomputing.org/> November 13-18, 2016 *Call for Papers* One of the hard realities is that the hardware continues to evolve very rapidly with diverse memory subsystems or cores with different ISAs or accelerators of varied types. The HPC community is in constant need for sophisticated software tools and techniques to port legacy code to these emerging platforms. Maintaining a single code base yet achieving performance portable solution continues to pose a daunting task. Directive-based programming models such as OpenACC, OpenMP tackle this issue by offering scientists a high-level approach to accelerate scientific applications and develop performance portable solutions. This enables accelerators to be first-class citizens for HPC! To address the rapid pace of hardware evolution, developers continue to explore and add richer features to the various (parallel) programming standards. Domain scientists continue to explore the programming and tools space while preparing themselves for future Exascale systems. This workshop aims to solicit papers that explore innovative language features – their implementations, compilation & runtime scheduling techniques, performance optimization strategies, auto-tuning tools exploring the optimization space and so on. WACCPD has been one of the major forums for bringing together the users, developers and tools community to share their knowledge and experiences of using directives and similar approaches to program emerging complex systems. *Important Deadlines* - Submission Deadline: August 22nd, 2016 AoE - Author notification: September 30th, 2016 - Camera Ready papers due: October 2nd, 2016 AOE * Topics of interest for workshop submissions include (but are not limited to):* - Compiler and Runtime support for current and emerging architectures - Language-based extensions - Memory management using directives - Performance evaluation and lessons learnt - Auto-tuning and optimization strategies - Programming experience porting applications in any domain - Extensions to and shortcomings of current accelerator directives APIs - Hybrid heterogeneous or many-core programming with accelerator directives with other models (i.e. OpenMP, MPI, OpenSHMEM) - Scientific libraries interoperability with accelerator directives - Experiences in implementing compilers for accelerator directives on newer architectures - Low level communication APIs or runtimes that support accelerator directives - Asynchronous execution and scheduling (heterogeneous tasks) - Power / energy studies - Static analysis and verification tools - Modeling and performance analysis tools - Benchmarks and validation suites *Best Paper Award:* NVIDIA has generously offered to sponsor the ‘Best Paper Award’ with NVIDIA’s newest *Pascal compute capable card*. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. *Paper Submission Guidelines* Submissions are limited to 10 pages. They must follow the ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) The 10-page limit includes figures, tables, and appendices, but does not include references, for which there is no page limit. Papers should be submitted electronically via EasyChair: https://easychair.org/conferences/?conf=waccpd2016 Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers will be presented at the workshop by one of the authors. *Journal Special Issue* A Special issue of the International Journal of High Performance Computing and Networking <http://www.inderscience.com/jhome.php?jcode=ijhpcn>(IJHPCN) titled ‘High Level Programming Approaches for Accelerators’ will feature invited contributions from the workshop. These special issues will be edited by Sunita Chandrasekaran and Guido Juckeland. The submission to this special issue is by invitation only. * Steering Committee:* - Barbara Chapman (StonyBrook University, cOMPunity, USA) - Oscar Hernandez (ORNL, USA) - Kuan-Ching Li (Providence University, Taiwan) - Satoshi Matsuoka (Titech, Japan) - Duncan Poole (OpenACC) - Thomas Schulthess (ORNL, USA) - Jeff Vetter (ORNL, USA) *Program Co-Chairs:* - Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf, Dresden, Germany - Sunita Chandrasekaran, University of Delaware, Newark, DE, USA *Program Committee:* - Christopher Bergstorm (Pathscale) - James Beyer (NVIDIA, USA) - Henri Callandra (TOTAL, USA) - Robert Dietrich (TU Dresden, Germany) - Fernanda Foertter (ORNL, USA) - Mark Govette (NOAA, USA) - Georg Hager (FAU, Germany) - Jeff Hammond (Intel, USA) - Christian Iwainsky (TU Darmstadt, Germany) - Arpith J. Jacob (IBM, USA) - Henri Jin (NASA-Ames, USA) - Wayne Joubert (ORNL, USA) - Michael Klemm (Intel, Germany) - Seyong Lee (ORNL, USA) - Antonio J. Pena (BSC, Spain) - William Sawyer (CSCS, Switzerland) - Thomas Schwinge (MentorGraphics, Germany) - Ray Sheppard (Indiana University, USA) - - Peter Steinbach (Scionics, Germany) - Christian Terboven (RWTH Aachen University, Germany) - Michael Wolfe (NVIDIA, USA) *Keynote Speaker:* *Jack Wells*, the Director of Science for the Oak Ridge Leadership Computing Facility (OLCF), will give the Keynote at the workshop. OLCF is a DOE Office of Science national user facility, and the Titan supercomputer is located at the Oak Ridge National Laboratory (ORNL). Wells is responsible for the scientific outcomes of the OLCF’s user programs. Wells has previously lead both ORNL’s Computational Materials Sciences group in the Computer Science and Mathematics Division and the Nanomaterials Theory Institute in the Center for Nanophase Materials Sciences. Prior to joining ORNL as a Wigner Fellow in 1997, Wells was a postdoctoral fellow within the Institute for Theoretical Atomic and Molecular Physics at the Harvard-Smithsonian Center for Astrophysics. Wells has a Ph.D. in physics from Vanderbilt University, and has authored or co-authored over 80 scientific papers and edited 1 book, spanning nanoscience, materials science and engineering, nuclear and atomic physics computational science, applied mathematics, and text-based data analytics. *Contact: * Pls email organizers(a)waccpd.org for any questions

1 0

Extended CFP: IEEE HPCC2016 (High Performance Computing and Communications), Dec. 2016, Sydney, Australia
by Andrew Clashe 19 Jul '16

19 Jul '16

Call for papers: As requested, we have extended the submission deadline to 22 August 2016 (11:59pm UTC/GMT), but this is firm then. The 18th IEEE International Conference on High Performance Computing and Communications (HPCC 2016), 12-14 Dec. 2016, Sydney, Australia. Website: www.swinflow.org/confs/2016/hpcc Key dates: Submission Deadline: August 22, 2016 (11:59pm UTC/GMT, firm) Notification: September 25, 2016 Final Manuscript Due: October 15, 2016 Submission site: http://www.swinflow.org/confs/2016/hpcc/submission.htm Publication: Proceedings will be published by IEEE CS Press. Special issues: Distinguished papers will be selected for special issues in Journal of Network and Computer Applications, Future Generation Computer Systems, Journal of Computer and System Sciences, IEEE Transactions on Emerging Topics in Computing =========== Introduction With the rapid growth in computing and communications technology, the past decade has witnessed a proliferation of powerful parallel and distributed systems and an ever increasing demand for practice of high performance computing and communications (HPCC). HPCC has moved into the mainstream of computing and has become a key technology in determining future research and development activities in many academic and industrial branches, especially when the solution of large and complex problems must cope with very tight timing schedules. Among a series of highly successful International Conferences on High Performance Computing and Communications (HPCC), the HPCC 2016 conference is the 18th edition of a forum for engineers and scientists in academia, industry, and government to address the resulting profound challenges and to present and discuss their new ideas, research results, applications and experience on all aspects of high performance computing and communications. IEEE HPCC 2016 is sponsored by IEEE, IEEE Computer Society, and IEEE Technical Committee on Scalable Computing (TCSC). Scope and Topics Topics of particular interest include, but are not limited to: 1. Parallel and distributed system architectures 2. Languages and compilers for high performance computing 3. Parallel and distributed software technologies 4. Parallel and distributed algorithms 5. Embedded systems 6. Peer-to-peer computing 7. Cluster computing 8. Web services and Internet computing 9. Cloud computing 10. Utility computing 11. Performance evaluation and measurement 12. Tools and environments for software development 13. Distributed systems and applications 14. High-performance scientific and engineering computing 15. Database applications and data mining 16. Biological/molecular computing 17. Collaborative and cooperative environments 18. Mobile computing and wireless communications 19. Computer Networks 20. Telecommunications 21. Pervasive/ubiquitous computing and intelligence 22. Autonomic, reliability and fault-tolerance 23. Trust, security and privacy Submission Guidelines Submissions must include an abstract, keywords, the e-mail address of the corresponding author and should not exceed 8 pages for main conference, including tables and figures in IEEE CS format. The template files for LATEX or WORD can be downloaded here. All paper submissions must represent original and unpublished work. Each submission will be peer reviewed by at least three program committee members. Submission of a paper should be regarded as an undertaking that, should the paper be accepted, at least one of the authors will register for the conference and present the work. Submit your paper(s) in PDF file at the submission site: http://www.swinflow.org/confs/2016/dss/submission.htm. Publications Accepted and presented papers will be included into the IEEE Conference Proceedings published by IEEE CS Press. Authors of accepted papers, or at least one of them, are requested to register and present their work at the conference, otherwise their papers may be removed from the digital libraries of IEEE CS and EI after the conference. Distinguished papers will be selected for special issues in Journal of Network and Computer Applications, Future Generation Computer Systems, Journal of Computer and System Sciences General Chairs Jack Dongarra, University of Tennessee, Knoxville, USA Albert Zomaya, The University of Sydney, Australia Laurence Yang, St. Francis Xavier University, Canada General Co-Chairs Rajkumar Buyya, University of Melbourne, Australia Nong Xiao, Sun Yat-Sen University, China Geyong Min, The University of Exeter, UK Program Chairs Carson Leung, University of Manitoba, Canada Dongsheng Li, National University of Defense Technology, China Yang Xiang, Deakin University, Australia Workshops Chairs Massimo Cafaro, University of Salento, Lecce, Italy Wei Zheng, Xiamen University, China Vinh Tung Le, UTS, Australia Steering Committee Chairs Laurence T. Yang, St. Francis Xavier University, Canada Beniamino Di Martino, Second University of Naples, Italy

1 0

CCPE Journal Special Issue on Trends in High-Performance Interconnection Networks - Deadline approaching
by Jesús Escudero Sahuquillo 19 Jul '16

19 Jul '16

[Apologies if you received multiple copies of this CFP] *** Deadline extended: July 28 (Hard deadline) ======================================================================== Special Issue on Trends in High-Performance Interconnection Networks in the Exascale and Big-Data Era Wiley Journal of Concurrency and Computation: Practice and Experience http://hipineb.i3a.info/hipineb2016/special-issue/ ======================================================================== GUEST EDITORS * Pedro Javier Garcia, University of Castilla-La Mancha, Spain * Jesus Escudero-Sahuquillo, University of Castilla-La Mancha, Spain SCOPE By the year 2023, High-Performance Computing (HPC) Systems are expected to break the performance barrier of the Exaflop (10^18 FLOPS) while their power consumption is kept at current levels (or incremented marginally), what is known as the Exascale challenge. In addition, more storage capacity and data-access speed is demanded to HPC clusters and datacenters to manage and store huge amounts of data produced by software applications, what is known as the Big-Data challenge. Indeed, both the Exascale and Big-Data challenges are driving the technological revolution of this decade, motivating big research and development efforts from industry and academia. In this context, the interconnection network plays an essential role in the architecture of HPC systems and datacenters, as the number of processing or storage nodes to be interconnected in these systems is very likely to grow significantly to meet the higher computing and storage demands. Besides, the capacity of the network links is expected to grow, as the roadmaps of several interconnect standards forecast. Therefore, the interconnection network should provide a high communication bandwidth and low latency, otherwise the network will become the bottleneck of the entire system. In that regard, many design aspects are considered when it comes to improve the interconnection network performance, such as topology, routing algorithm, power consumption, reliability and fault tolerance, congestion control, programming models, control software, etc. All researchers and professionals, both from industry and academia, working in the area of interconnection networks for scalable HPC systems and Datacenters, and especially those involved in Exascale performance and Big-Data, are encouraged to submit a paper to this special issue. TOPICS OF INTEREST The list of topics covered by this Special Issue includes, but is not limited to, the following: * Interconnect architectures and network technologies for high-speed, low-latency interconnects. * Scalable network topologies, suitable for interconnecting a huge number of nodes. * Power saving policies in the interconnect devices and network infrastructure, both at software and hardware level. * Emerging ideas, work-in-progress and early, high-impact achievements. * Good practices in the configuration of the network control software. * Network communication protocols: MPI, RDMA, Hadoop, etc. * APIs and support for programming models. * Routing algorithms. * Quality of Service (QoS). * Reliability and Fault tolerance. * Load balancing and traffic scheduling. * Network Virtualization. * Congestion Management. * Applications and Traffic characterization. * Modeling and simulation tools. * Performance Evaluation. Note that papers focused on topics that are too far from the design, development and configuration of high-performance interconnects for HPC systems and Datacenters (e.g., mobile networks, intrusion detection, peer-to-peer networks or grid/cloud computing) will be automatically considered as out of scope and rejected without review. IMPORTANT DATES Deadline for submissions: Extended to July 28 (hard deadline) First rounds of review: September 7, 2016 Deadline for revised papers: October 7, 2016 Final decision notification: October 23, 2016 Camera Ready: October 30, 2016 Estimated publication date: January 31, 2017 All deadlines are set at 11:59 p.m. anywhere on Earth (cf. http://wirelessman.org/aoe.html) INSTRUCTIONS FOR AUTHORS * This call is open for all contributions, but it also invites selected papers from the 2nd edition of the HiPINEB workshop ( http://hipineb.i3a.info/hipineb2016) * Authors must abide by the requirement of adding significant novelty to the papers submitted to this special issue. Extended versions of conference papers must contain at least 50% new content. Besides, it is mandatory to attach a cover letter to any submission, explaining the main contributions of the paper. * Manuscripts should not exceed 25 pages in length. * It is expected that submissions will align with the topics of interest listed above. * Manuscripts should accomplish the general rules defined at: http://www.cc-pe.net/journalinfo/issues/2016.html#HiPINEB2016 * Papers should be submitted via Manuscript Central to special issue “HiPINEB2016”: http://mc.manuscriptcentral.com/cpe ADDITIONAL INFORMATION For more information about this special issue or if you have any question, please contact the guest editors at jesus.escudero(a)uclm.es or pedrojavier.garcia(a)uclm.es

1 0

Call for Papers:Ninth Workshop on High Performance Computational Finance (WHPCF 2016)
by Jose Moreira 18 Jul '16

18 Jul '16

WHPCF 2016: Ninth Workshop on High Performance Computational Finance http://ewh.ieee.org/conf/whpcf/ Friday, November 18th, 2016 Salt Lake City, Utah Held in conjunction with "SC16" Important Dates Submission deadline: August 15th, 11:59 EDT Author notification: September 12th Final version due: October 3rd Call For Papers The purpose of this workshop is to bring together practitioners, researchers, vendors, and scholars from the complementary fields of computational finance and high performance computing, in order to promote an exchange of ideas, discuss future collaborations and develop new research directions. Financial companies increasingly rely on high performance computers to analyze high volumes of financial data, automatically execute trades, and manage risk. As financial market data continues to grow in volume and complexity, computational capabilities of emerging hardware also increases. Extracting high performance from emerging architectures requires a combination of domain knowledge and specialized technical skills. The workshop will explore how researchers, scholars, vendors and practitioners are collaborating to address high performance computing research challenges. We have peer-reviewed paper submissions that cover various aspects of computational finance. In addition to submissions that deal with performance and programmability challenges, theoretical analysis, algorithms, and practical experience in computational finance, we have focussed on submissions that demonstrate or result from the collaboration between financial practitioners, and academics, researchers, or vendors. For 2016, we are particularly interested in submissions addressing the following emerging topics in high performance computational finance: · High performance machine learning for financial trading · Use of the FPGAs for high frequency trading · XVA pricing · Adjoint algorithmic differentiation (AAD) · Many-core implementation of derivative pricing, calibration, risk management · Use of high performance Python and R Additional topics of interest to this workshop include, but are not restricted to: · Use of accelerator platforms for stream processing · Fast algorithms for algorithmic trading and high frequency risk management · Scalable in-memory data processing platforms for large-scale computations · Software infrastructure for high performance and high productivity · Use of parallel design patterns for mapping of applications to parallel hardware · Financial libraries and run-times · Use of accelerator platforms for stream processing · Use of heterogeneous hardware in computational finance · Financial applications of high performance computing: risk algorithms, derivative pricing, algorithmic trading, arbitrage · High-bandwidth/low-latency streaming of market data · Cluster computing for computational finance · Financial data center engineering · Computational algorithms for finance · Move from capacity to capability computing in financial applications Author Instructions Submitted papers must be no more than 8 pages in length. The camera ready version of accepted papers must be in ACM Proceedings format ( http://www.acm.org/publications/proceedings-template) . Each submission will receive at least three reviews from the technical program committee and authors of selected submissions will have 30 minutes to present their work at the workshop. Papers should be submitted in electronic form to jmoreira(a)us.ibm.com. Program Committee John Ashley, NVIDIA Corp Michael Creel, Universitat Autònoma de Barcelona Dirk Eddelbuettel, Ketchum Trading Mike Giles, Oxford University Juho Kanniainen, Tampere University of Technology Hicham Lahlou, Xcelerit Peter Lankford, STAC John Lockwood, AlgoLogix Pat Miller, Jump Trading Uwe Naumann, RWTH Aachen Cornelis W. Oosterlee, CWI Brian Peterson, DV Trading José Antonio García Rodríguez, Universidade da Coruña Jason Sewall, Intel Corporation Brad Spiers, Micron Jacques Du Toit, NAG Muhammad Zubair, Old Dominion University Steering Committee Matthew Dixon, Illinois Institute of Technology Jose Moreira, IBM Thomas J. Watson Research Center Shih-Hau Tan, University of Greenwich José E. Moreira Research Staff Member Future POWER Systems Concept Team IBM Thomas J. Watson Research Center Yorktown Heights NY 10598-0218 phone: 1-914-945-1709, fax: 1-914-945-4425 e-mail: jmoreira(a)us.ibm.com URL: http://www.research.ibm.com/people/m/moreira

1 0

Call for papers: MTAGS16: 9th Workshop on Many-Task Computing on Clouds, Grids, and Supercomputers
by Ke Wang 18 Jul '16

18 Jul '16

Call for Papers --------------------------------------------------------------------------------------- MTAGS16: 9th Workshop on Many-Task Computing on Clouds, Grids, and Supercomputers https://sites.google.com/site/mtags2016/ --------------------------------------------------------------------------------------- November 14th, 2016 Salt Lake City, Utah, USA In cooperation with ACM SIGHPC. Held in conjunction with SC16: The International Conference on High Performance Computing, Networking, Storage and Analysis. ======================================================================================= The 9th workshop on Many-Task Computing on Clouds, Grids, and Supercomputers (MTAGS) will provide the scientific community a dedicated forum for presenting new research, development, and deployment efforts of large-scale many-task computing (MTC) applications on large scale clusters, clouds, grids, and supercomputers. MTC, the theme of the workshop encompasses loosely coupled applications, which are generally composed of many tasks to achieve some larger application goal. This workshop will cover challenges that can hamper efficiency and utilization in running applications on large-scale systems, such as local resource manager scalability and granularity, efficient utilization of raw hardware, parallel file-system contention and scalability, data management, I/O management, reliability at scale, and application scalability. We welcome paper submissions in theoretical, simulations, and systems topics with special consideration to papers addressing the intersection of petascale/exascale challenges with large-scale cloud computing. Papers will be peer-reviewed, and accepted papers will be published in the workshop proceedings as part of the ACM SIGHPC. The workshop will be held in conjunction with SC16: The International Conference on High Performance Computing, Networking, Storage and Analysis, in Salt Lake City on November 14th, 2016. For more information, please see https://sites.google.com/site/mtags2016/. For more information on past workshops, please see MTAGS15, MTAGS14, MTAGS13, MTAGS12, MTAGS11, MTAGS10, MTAGS09, and MTAGS08. We also ran a special issue on Many-Task Computing in the IEEE Transactions on Parallel and Distributed Systems (TPDS): http://www.computer.org/portal/web/csdl/abs/trans/td/2011/06/ttd201106toc.h… . In addition, we are running a special issue on Many-Task Computing in the Cloud in the IEEE Transaction on Cloud Computing: http://datasys.cs.iit.edu/events/TCC-MTC15/. We, the workshop organizers, also published a highly relevant paper that defines Many-Task Computing which was published in MTAGS08, titled “Many-Task Computing for Grids and Supercomputers”; we encourage potential authors to read this paper, and to clearly articulate in your paper submissions how your papers are related to Many-Task Computing. Topics --------------------------------------------------------------------------------------- We invite the submission of original work that is related to the topics below. The papers should be 6 pages, including all figures and references. We aim to cover topics related to Many-Task Computing on each of the three major distributed systems paradigms, Cloud Computing, Grid Computing and Supercomputing. Topics of interest include: * Compute Resource Management * Scheduling * Job execution frameworks * Local resource manager extensions * Performance evaluation of resource managers in use on large scale systems * Dynamic resource provisioning * Techniques to manage many-core resources and/or GPUs * Challenges and opportunities in running many-task workloads on HPC systems * Challenges and opportunities in running many-task workloads on Cloud Computing infrastructure * Storage architectures and implementations * Distributed file systems * Parallel file systems * Distributed meta-data management * Content distribution systems for large data * Data caching frameworks and techniques * Data management within and across data centers * Data-aware scheduling * Data-intensive computing applications * Eventual-consistency storage usage and management * Programming models and tools * Map-reduce and its generalizations * Many-task computing middleware and applications * Parallel programming frameworks * Ensemble MPI techniques and frameworks * Service-oriented science applications * Large-Scale Workflow Systems * Workflow system performance and scalability analysis * Scalability of workflow systems * Workflow infrastructure and e-Science middleware * Programming Paradigms and Models * Large-Scale Many-Task Applications * High-throughput computing (HTC) applications * Data-intensive applications * Quasi-supercomputing applications, deployments, and experiences * Performance Evaluation * Performance evaluation * Real systems * Simulations * Reliability of large systems Paper Submission and Publication --------------------------------------------------------------------------------------- Authors are invited to submit papers with unpublished, original work of not more than 6 pages of double column text using single spaced 10 point size on 8.5 x 11 inch pages, as per IEEE 8.5 x 11 manuscript guidelines; document templates can be found at http://www.ieee.org/conferences_events/conferences/publishing/templates.html. The final 6 page papers in PDF format must be submitted online at easychair: https://easychair.org/conferences/?conf=mtags16 before the deadline. Papers will be peer-reviewed for novelty, scientific merit, and scope for the workshop, and accepted papers will be published in the workshop proceedings as part of the ACM digital library. Submission implies the willingness of at least one of the authors to register and present the paper. Important Dates --------------------------------------------------------------------------------------- * Papers Due: August 28th, 2016 * Notification of Acceptance: September 30th, 2016 * Camera Ready Papers Due: October 14th, 2016 * Workshop Date: November 14th, 2014 Committee Members --------------------------------------------------------------------------------------- Workshop Chairs * Ke Wang, Enterprise & HPC Platform Group, Intel, Hillsboro, OR, USA * Justin Wozniak, University of Chicago & Argonne National Laborator * Ioan Raicu, Illinois Institute of Technology & Argonne National Laboratory, USA Steering Committee * David Abramson, Monash University, Australia * Ian Foster, University of Chicago & Argonne National Laboratory * Yong Zhao, University of Electronic Science and Technology of China * David Abramson, Monash University, Australia * Jack Dongarra, University of Tennessee, USA * Geoffrey Fox, Indiana University, USA * Manish Parashar, Rutgers University, USA * Marc Snir, University of Illinois at Urbana Champaign, USA * Xian-He Sun, Illinois Institute of Technology, USA * Weimin Zheng, Tsinghua University, China Technical Committee (unconfirmed) * James Hamilton, Amazon Web Services, USA * Kamil Iskra, Argonne National Laboratory * Pete Beckman, Argonne National Laboratory * Rob Ross, Argonne National Labs * David O'Hallaron, Carnegie Mellon University, Intel Labs, USA * Hakim Weatherspoon, Cornell University, USA * Alexandru Iosup, Delft University of Technology, Netherlands * Jeff Chase, Duke University, USA * Catalin Dumitrescu, Fermi National Labs * Jeff Dean, Google, Inc., USA * Alan Gara, IBM Research, USA * Jose Moreira, IBM Research, USA * Zhiling Lan, Illinois Institute of Technology * Marlon Pierce, Indiana University, USA * Geoffrey Fox, Indiana University, USA * Lavanya Ramakrishnan, Lawrence Berkeley National Laboratory * Tevfik Kosar, Louisiana State University, USA * Evangelinos Constantinos, Massachusetts Institute of Technology * Tony Hey, Microsoft Research, USA * Alec Wolman, Microsoft Research, USA * Dan Reed, Microsoft Research, USA * Dennis Gannon, Microsoft Research, USA * Michael Isard, Microsoft Research, USA * Mihai Budiu, Microsoft Research, USA * David Abramson, Monash University, Australia * Kento Aida, NII and Tokyo Institute of Technology * Alok Choudhary, Northwestern University, USA * Peter Dinda, Northwestern University, USA * Arthur Maccabe, Oak Ridge National Labs * Manish Parashar, Rutgers University * Valerie Taylor, Texas A&M * Edward Walker, Texas Advanced Computing Center * Matthew Woitaszek, The University Coorporation for Atmospheric Research * Florin Isaila, Universidad Carlos III de Madrid * Ignacio Llorente, Universidad Complutense de Madrid, Spain * Matei Ripeanu, University of British Columbia, Canada * Kathy Yelick, University of California at Berkeley, USA * Ken Yocum, University of California, San Diego * Rich Wolski, University of California, Santa Barbara, USA * Mike Wilde, University of Chicago & Argonne National Laboratory, USA * Daniel Katz, University of Chicago, USA * Henri Casanova, University of Hawai`i at Manoa * Robert Grossman, University of Illinois at Chicago, USA * Indranil Gupta, University of Illinois at Urbana Champaign * Marc Snir, University of Illinois at Urbana Champaign, USA * Rajkumar Buyya, University of Melbourne * Reagan Moore, University of North Carolina, Chappel Hill, USA * Douglas Thain, University of Notre Dame, USA * Adriana Iamnitchi, University of South Florida, USA * Ewa Deelman, University of Southern California * Ann Chervenak, University of Southern California, USA * Carl Kesselman, University of Southern California, USA * Ed Lazowska, University of Washington, USA * Alain Roy, University of Wisconsin * Miron Livny, University of Wisconsin, Madison, USA * Remzi Arpaci-Dusseau, University of Wisconsin, Madison, USA * Larry Rudolph, VMware, USA * Brian Cooper, Yahoo! Research, USA * Jik-Soo Kim, Korea Institute of Science and Technology Information, Daejeon, Republic of Korea * Scott Klasky Oak Ridge National Laboratory, USA * Mike Boros, Cray, USA -- ============================================================ Ke Wang, Ph.D. Software Engineer, Intel Corporation, USA ============================================================ *Cel:* 1-312-532-2105 *Addr:* 2501 NW 229th Ave RA2-4-D8 Hillsboro, OR 97124, USA *Email:* *kwang22(a)hawk.iit.edu <kewangiit(a)gmail.com>* *kewangiit(a)gmail.com <kewangiit(a)gmail.com> * *Web:* http://datasys.cs.iit/~kewang/ <http://datasys.cs.iit.edu/~kewang/> http://datasys.cs.iit.edu/ ============================================================ ============================================================

1 0

5th Workshop on EXTREME-SCALE PROGRAMMING TOOLS (ESPT) at SC16 (deadline 9/2)
by malony＠cs.uoregon.edu 18 Jul '16

18 Jul '16

**************************************************************************** CALL FOR PAPERS 5th Workshop on EXTREME-SCALE PROGRAMMING TOOLS (ESPT) Held in conjunction with SC16: The International Conference on High Performance Computing, Networking, Storage and Analysis Salt Lake City, UT, USA 13 November 2016 http://www.vi-hps.org/symposia/espt/espt-sc16.html In cooperation with SIGHPC Supported by Virtual Institute - High Productivity Supercomputing (VI-HPS) Submission Deadline: September 2, 2016 **************************************************************************** The path to exascale computing will challenge HPC application developers in their quest to achieve the maximum potential that the machines have to offer. Factors such as limited power budgets, heterogeneity, hierarchical memories, shrinking I/O bandwidths, and performance variability will make it increasingly difficult to create productive applications on future platforms. Tools for debugging, performance measurement and analysis, and tuning will be needed to overcome the architectural, system, and programming complexities envisioned in these exascale environments. At the same time, research and development progress for HPC tools faces equally difficult challenges from exascale factors. Increased emphasis on autotuning, dynamic monitoring and adaptation, heterogeneous analysis, and so on will require new methodologies, techniques, and engagement with application teams. This workshop will serve as a forum for HPC application developers, system designers, and tools researchers to discuss the requirements for exascale-ready/exascale-enabled tools and the roadblocks that need to be addressed. The workshop is the fifth in a series of SC conference workshops organized by the Virtual Institute - High Productivity Supercomputing (VI-HPS), an international initiative of HPC researchers and developers focused on parallel programming and performance tools for large-scale systems. Workshop Format and Topics: The half-day workshop will consist of a keynote address followed by research paper presentations. Each paper submission will undergo a peer review process. Accepted contributions will be published in the SC workshop proceedings in cooperation with SIGHPC through the ACM Digital Library and IEEE Xplore. The workshop topics of interest include: * Programming tools (e.g., performance analysis, tuning, debuggers, IDEs) * Methodologies for performance engineering * Tool technologies for extreme-scale challenges (e.g., scalability, resilience, power) * Tool infrastructures and environments * Application developer experiences with programming and performance tools Paper Submission: Papers covering original and previously unpublished research are solicited. To be considered, a manuscript should be a maximum of 8 pages and formatted according to the double-column IEEE format for Conference Proceedings (IEEEtran LaTeX Class (template) V1.8 packages and IEEEtran V1.12 BibTeX (bibliography)). Margins and font sizes should not be modified. The templates for "IEEEtran LaTeX Class (template) V1.8 packages and IEEEtran V1.12 BibTeX (bibliography)" can be found at: http://www.ieee.org/conferences_events/conferences/publishing/templates.html All papers must be submitted through Easychair at: https://www.easychair.org/conferences/?conf=espt2016 Important Dates: 2016-09-02: Paper submissions due 2016-09-23: Author notification 2016-10-04: Final version of papers due 2016-11-13: Workshop, 13:30-17:30 Workshop Organizers: Allen D. Malony, University of Oregon William Jalby, Université de Versailles St-Quentin-en-Yvelines Martin Schulz, Lawrence Livermore National Laboratory, USA Felix Wolf, TU Darmstadt, Germany Contact: Allen D. Malony, University of Oregon Phone +1-541-346-4407, Email: malony(a)cs.uoregon.edu Program Committee: Luiz DeRose, Cray Inc., US Michael Gerndt, Technische Universität München, Germany Jeffrey K. Hollingsworth, University of Maryland, US William Jalby, Université de Versailles St-Quentin-en-Yvelines, France Andreas Knüpfer, Technische Universität Dresden, Germany David Lecomber, Allinea Software, US Allen D. Malony, University of Oregon, US John Mellor-Crummey, Rice University, US Martin Schulz, Lawrence Livermore National Laboratory, US Sameer Shende, University of Oregon, US Felix Wolf, Technische Universität Darmstadt Brian Wylie, Jülich Supercomputing Centre

1 0

[EWiLi] Submission deadline extended
by Jalil Boukhobza 18 Jul '16

18 Jul '16

**************************************************************************** ************** News: - Deadline extension: Abstract submission deadline : 25th of July Paper submission deadline : 1st of August - We are very glad to announce our keynote speaker: Pr. Daniel Mossé from the University of Pittsburgh with a talk related to energy saving issues. **************************************************************************** *************** Call For Papers EWiLi'16, the 6th Embedded Operating System Workshop held in conjunction with ESWEEK October 6th, PITTSBURGH, PA, USA EXTENDED DEADLINE: Abstract submission deadline : 25th of July Paper submission deadline : 1st of August http://syst.univ-brest.fr/ewili2016 **************************************************************************** *************** Aim and Scopes EWiLi, the embedded operating system workshop, aims at presenting state-of-the-art research, experimentations, significant and original realizations that focus on the design and implementation of embedded operating systems in both academic and industrial worlds. Expected contributions include but are not limited to the following topics, but should all consider embedded operating systems : - Reconfigurable architectures - Heterogeneous MPSOC and Multicore - Sensor networks - Multimedia systems - Cyber physical systems - Internet of things - Methods, software and tool chains - Model-driven Engineering - Data management and memory hierarchy optimization - Real-time, concurrency, scheduling and temporal performance - File systems, storage, and I/Os in embedded operating systems - Debug and profiling - Energy and power optimization - Performance evaluation and optimization - Safety and security concerns - Case studies and application projects - Embedded operating systems and education Submissions & publication Submission link: https://easychair.org/conferences/?conf=ewili16 Papers should not exceed 6 pages in ACM SIG format (see http://sigbed.seas.upenn.edu/submit.html ) All accepted papers will be published in the ACM SIGBED Review (ISSN: 1551-3688) Special Interest Group on Embedded Systems. Important dates: Abstract submission deadline : 25th of July Paper submission deadline : 1st of August Notifications to authors: 29 August 2016 Camera ready versions: 19 September 2016 Steering committee (to be completed): Jalil BOUKHOBZA (Associate professor, Lab-STICC/University of Western Brittany, France) Marco Dominico SANTAMBROGIO (Polytech. Milano, Italy) Frank SINGHOFF (Professor, Lab-STICC/University of Western Brittany, France) Contact: boukhobza(a)univ-brest.fr Publicity chairs Giuseppe LIPARI (Univ. Lilles, France) Duo Liu (Chongqing Univ., China) Program committee (to be completed/confirmed) Mario ALDEA-RIVAS (Univ. de Cantabria, Spain) Sébastien BILAVARN (LEAT/Univ. Nice, France) Gedare BLOOM (Howard University, USA) Julien BOIBESSOT (Armadeus Systems, France) Jalil BOUKHOBZA (Lab-STICC/Univ. Western Brittany, France) Eric GRESSIER (CNAM Paris, France) Emmanuel GROLLEAU (LIAS, ISAE-ENSMA, France) Dionisio DE NIZ (SEI, Carnegie Mellon University, USA) Jean Philippe DIGUET (Lab-STICC/ Univ. Of South Brittany, France) Henrique DOMINGOS (FCT/Univ. Nova de Lisboa, Portugal) Pierre FICHEUX (Openwide, France) Ann GORDON-ROSS (Univ. of Florida, USA) Henry HOFFMANN (University of Chicago, USA) Michael HUEBNER (Ruhr-University of Bochum, Germany) Jérôme HUGUES (ISAE, France) Mathieu JAN (CEA, France) Patrice KADIONIK (ENSEIRB, France) Mouloud KOUDIL (ESI, Algeria) John KUBIATOWICZ (Univ. of California Berkeley, USA) Giuseppe LIPARI (Univ. Lilles, France) Duo Liu (Chongqing Univ., China) Manolis MARAZAKIS (ICS FORTH, Greece) Pierre Olivier (Virginia Tech, USA) Laurent PAUTET (Telecom Paris-Tech, France) Luis Miguel PINHO (CISTER/ISEP, Portugal) Juan Antonio de la PUENTE (DIT-UPM, Spain) José RUFINO (FCUL, Portugal) José RUIZ (AdaCore, France) Marco D. SANTAMBROGIO (Polytech. Milano, Italy) Eric SENN (Lab-STICC/Univ. of South Brittany, France) Joel SHERRILL (OAR Corporation, USA) Frank SINGHOFF (Lab-STICC/Univ. Western Brittany, France) Frank SIQUEIRA (Univ. Federal de Santa Catarina, Brasil) Zili SHAO (Polytechnic Univ. Hong Kong, Hong Kong) Oleg SOKOLSKY (University of Pennsylvania, USA) Jon SOLWORTH (University of Illinois, USA) John WILLIAMS (ex. PetaLogix/Xilinx, Australia)

1 0

CFP - Deadline extended - The 2nd IEEE Workshop on Orchestration for Software-Defined Infrastructures (O4SDI-2)
by Walter Cerroni 16 Jul '16

16 Jul '16

------------------------------------------------------------------------- Please accept our apologies if you receive multiple copies of this CFP ------------------------------------------------------------------------- ****** DEADLINE Extended to July 31, 2016 ****** CALL FOR PAPERS 2nd IEEE Workshop on Orchestration for Software-Defined Infrastructures (O4SDI-2) To be held in conjunction with the 2016 IEEE Conference on Network Function Virtualization and Software Defined Networks (IEEE NFV-SDN 2016) November 7, 2016 - Palo Alto, California, USA http://o4sdi.unibo.it/o4sdi2 ------------------------------------------------------------------------- IMPORTANT DATES Paper submission deadline: July 31, 2016 (EXTENDED) Acceptance notification: September 16, 2016 Camera-ready papers: October 7, 2016 SUBMISSION INFORMATION Paper submissions are handled on-line through the EDAS system: https://edas.info/newPaper.php?c=22175&track=81344 ----------------------------------------------------------------------- SCOPE The current industry trend of convergence between computing and networking eco-systems clearly shows that software will play an unprecedented dominant role also in future communication environments. Computing, storage, and connectivity services, as well as any other present and future application instances, will be deployed in the form of virtualized assets within a software-defined infrastructure running on top of general-purpose processing and communication hardware, all managed and made available under the cloud “As A Service” paradigm. This technological convergence and infrastructure sharing between the computing and communication systems portend a scenario with a “fog” of micro-clouds composed of generalized virtual functions providing both applications and network services that supplement those deployed in traditional cloud datacenters. The Second IEEE Workshop on Orchestration for Software-Defined Infrastructures (O4SDI) addresses the challenges that will facilitate orchestration and programmability of generalized virtual functions in Software Defined Infrastructures (SDI), enabling cloud and network providers to deploy integrated services across different resource domains. Orchestration mechanisms will facilitate the live deployment and lifecycle management of these virtual elements, at the application level, the server level, and the network level within a single domain and across multiple domains. Without such orchestration it will not be possible to enable dynamic establishment of generalized virtual function chains, according to service requirements. These challenges of orchestration are many-fold, with many open questions that need to be addressed in the areas of: - network "softwarization," which requires unified management of computing, storage, and network resources for the effective deployment, lifecycle management, and run-time configuration of generalized virtual functions; - abstraction models and open standard interfaces, needed for assuring vendor interoperability; - adaptation and optimization mechanisms, which must be enforced at global and/or local level for coping with user demand, application requirements, resource unavailability, etc. O4SDI aims at providing an international forum for researchers and practitioners from academia, industry, network operators, and service providers to discuss and address the challenges deriving from such emerging scenario where systems, processes, and workflows used in both computing and communications domains are converging. ------------------------------------------------------------------------- TOPICS OF INTEREST Due to the highly interdisciplinary scope of the workshop, contributions are expected from both computing and network-oriented research communities, with the aim of facilitating discussion, cross- fertilization and exchange of ideas and practices, and successfully promote innovative solutions toward a real programmatic use of software- defined infrastructures as a whole. Contributions that discuss lessons learnt and best practices, describe practical deployment and implementation experiences, and demonstrate innovative use-cases are especially encouraged for presentation and publication. We are particularly interested in papers that cover, but are not limited to, the following topics: - single domain and cross domain orchestration issues - integrated network and computing resource control and management - control and abstraction of heterogeneous networks - orchestration in SDN/NFV - run-time orchestration - orchestration for next-generation IP and optical networks - orchestration in 5G networks - QoS/QoE in software-defined infrastructures - orchestration for high-availability and resilience in software-defined infrastructures - intent-based orchestration - dynamic service composition and delivery - network programmability for service chaining - software engineering and operating systems techniques applied to orchestration - description, specification, and abstraction languages for orchestration - optimal orchestration algorithms - context-aware orchestration - functional architectures of orchestrating elements - testbed experiments on orchestrations - performance evaluation of orchestration elements - standardization issues in orchestration ------------------------------------------------------------------------- WORKSHOP CO-CHAIRS Stuart Clayman, University College London, UK - s.clayman(a)ucl.ac.uk Walter Cerroni, University of Bologna, Italy - walter.cerroni(a)unibo.it Barbara Martini, CNIT, Pisa, Italy - barbara.martini(a)cnit.it Federica Paganelli, CNIT, Firenze, Italy - federica.paganelli(a)cnit.it TECHNICAL PROGRAM COMMITEE Giuseppe Bianchi, University of Rome Tor Vergata, Italy Roberto Bifulco, NEC, Germany Amina Boubendir, Orange Labs Paris, France Sanda Buda, IBM, Ireland Franco Callegati, University of Bologna, Italy Hakki Cankaya, Fujitsu Network Communications, USA Ramon Casellas, CTTC, Spain Maurizio Casoni, University of Modena and Reggio Emilia, Italy Piero Castoldi, Scuola Superiore Sant’Anna, Italy Prosper Chemouil, Orange Labs, France Chiara Contoli, University of Bologna, Italy Flavio Esposito, Saint Louis University, USA Luca Foschini, University of Bologna, Italy Molka Gharbaoui, Scuola Superiore Sant’Anna, Itally Imen Grida BenYahia, Orange Labs, France Riccardo Guerzoni, DoCoMo Eurolab, Germany Vatche Ishakian, IBM, USA Slawomir Kuklinski, Orange Poland, Poland Lefteris Mamatas, University of Macedonia, Greece Antonio Manzalini, Telecom Italia, Italy Catalin Meirosu, Ericsson, Sweden Paolo Monti, KTH, Sweden Julius Mueller, AT&T, USA Jordi Ortiz, Univ Murcia, Spain Francesca Paradiso, University of Florence, Italy Fulvio Risso, Politecnico di Torino, Italy Javier Rubio-Loyola, CINVESTAV Tamaulipas, Mexico Stefano Secci, University Pierre et Marie Curie, France Joan Serrat, Universitat Politècnica de Catalunya, Spain Antonio Fernando Skarmeta Gomez, University of Murcia, Spain Joao Soares, Ericsson, Sweden Mauro Tortonesi, University of Ferrara, Italy Daphne Tuncer, University College London, UK Ishan Vaishnavi, Huawei, Germany Mohammed Faten Zhani, University of Waterloo, Canada ------------------------------------------------------------------------- AUTHOR GUIDELINES Prospective authors are invited to submit high-quality, original technical papers for presentation at the workshop and publication in the O4SDI Proceedings and IEEE Xplore. Papers must be written in English, unpublished and not submitted elsewhere. Full papers must be formatted as the standard IEEE double-column conference template. All final submissions should have a maximum paper length of six (6) printed pages (10-point font), including figures, without incurring additional page charges. To be published in the Workshop Proceedings and to be eligible for publication in IEEE Xplore, at least one author of an accepted paper is required to register and present the paper at the workshop. The IEEE reserves the right to exclude a paper from distribution after the conference (including its removal from IEEE Xplore) if the paper is not presented at the conference. Papers are reviewed on the basis that they do not contain plagiarized material and have not been submitted to any other conference at the same time (double submission). For additional author guidelines, please refer to: http://nfvsdn2016.ieee-nfvsdn.org/authors/call-for-papers/submission-guidel…

1 0

ExaMPI16 @ SC16 - Call For Papers
by Grant, Ryan Eric (-EXP) 15 Jul '16

15 Jul '16

--------------------------------------------------------------------------------------- ExaMPI16 - Workshop on Exascale MPI 2016 --------------------------------------------------------------------------------------- Sunday November 13th, 2016 Salt Lake City, Utah USA Held in conjunction with SC16: The International Conference for High Performance Computing, Networking, Storage and Analysis Held in cooperation with ACM SIGHPC (http://www.sighpc.org/) * Paper submission: September 2, 2016 * Acceptance notification: September 23, 2016 * Final papers due: October 6, 2016 https://sites.google.com/site/exampi2016/home =========================================================== The MPI standard and its implementations have proved surprisingly scalable. Issues that hampered scalability have been addressed in the MPI 2.1 – 2.2 definition process, and continued into MPI 3.0 and 3.1. Thus MPI has been robust, and been able to evolve, without fundamentally changing the model and specification. For this and many other reasons MPI is currently the de-facto standard for HPC systems and applications. However, there is a need for re-examination of the message-passing model for extreme-scale systems characterized by asymptotically decreasing local memory and highly localized communication networks. Likewise, there is a need for exploring new innovative and potentially disruptive concepts and algorithms partially to explore other roads than those taken by the recently released MPI 3.1 standard. The aim of workshop is to bring together developers and researchers to present and discuss innovative algorithms and concepts in Message Passing programming models, in particular related to MPI. This year’s theme is on concurrency in MPI and underlying networks and we especially encourage submissions aligned with this theme. Topics of interest (but are not limited to) --------------------------------------------------------------------------------------- * Development of scalable Message Passing collective operations. * Communication topology mapping interfaces and algorithms. * Innovative algorithms for scheduling/routing to avoid network congestion. * Integrated use of structured data layout descriptors. * One-sided communication models and RDMA-based MPI. * MPI multi-threading and threading requirements from OSes. * Interoperability of Message Passing and PGAS models. * Integration of task-parallel models into Message Passing models. * Fault tolerance in MPI. * MPI I/O. Paper submission and publication --------------------------------------------------------------------------------------- There are two submission categories: * Regular research paper: submission of full paper. Regular paper submissions are limited to 10 single-space pages (including figures, tables and references) using a 10-point on 8.5x11-inch pages (US Letter). Templates can be found in: http://www.acm.org/sigs/publications/proceedings-templates. Accepted regular research papers will be archived in both the ACM Digital Library and IEEE Xplore, by virtue of SIGHPC. Authors of accepted papers will be required to sign the ACM copyright form. Instructions for preparing regular papers for the proceedings will be emailed to authors of accepted papers. * Hot topic abstract: submission of an extended abstract. These submissions target work-in-progress research on potentially controversial topics in Message-Passing. Hot topic extended abstracts are limited to 3 single-space pages: http://www.acm.org/sigs/publications/proceedings-templates. Accepted hot topic extended abstracts will be published only on the ExaMPI15 website. Regular Papers and extended abstracts should be submitted electronically at: https://easychair.org/conferences/?conf=exampi16 Important dates --------------------------------------------------------------------------------------- * Paper submission: September 2, 2016 * Acceptance notification: September 23, 2016 * Final papers due: October 6, 2016 Workshop Organizers --------------------------------------------------------------------------------------- Ryan E. Grant Sandia National Laboratories Patrick G. Bridges University of New Mexico Anthony Skjellum Auburn University Purushotham Bangalore University of Alabama at Birmingham Ron Brightwell Sandia National Laboratories Pavan Balaji Argonne National Laboratory Masamichi Takagi RIKEN AICS Program Committee --------------------------------------------------------------------------------------- Ahmad Afsahi Queen's University Pavan Balaji Argonne National Laboratory Purushotham Bangalore University of Alabama at Birmingham Wesley Bland Intel Corporation George Bosilca University of Tennessee Patrick Bridges University of New Mexico Ron Brightwell Sandia National Laboratories Ryan E. Grant Sandia National Laboratories William Gropp University of Illinois at Urbana-Champaign Jeff Hammond Intel Labs Nathan Hjelm Los Alamos National Laboratory Torsten Hoefler ETH Zurich Dan Holmes EPCC, The University of Edinburgh Stefano Markidis KTH Royal Institute of Technology Lena Oden Argonne National Laboratory Min Si Argonne National Laboratory Tony Skjellum Auburn University Hari Subramoni Ohio State University Sayantan Sur Intel Corp. Masamichi Takagi RIKEN AICS Jesper Larsson Träff Vienna University of Technology (TU Wien) Alan Wagner University of British Columbia

1 0

[PPoPP 2017] Research Papers Due in Two Weeks
by Jeff Huang 15 Jul '16

15 Jul '16

(We would like to apologize if you receive multiple copies of this message) *PPoPP 2017: 22nd ACM SIGPLAN Annual Symposium* * on **Principles **and Practice of Parallel Programming* Austin, Texas, USA, February 4 - 8, 2017 (collocated with HPCA-2017 and CGO-2017) http://ppopp.org *Full paper submission: August 1, 2016* Author response period I: September 22 -- 26, 2016 Author response period II: October 24--28, 2016 Author Notification: November 12, 2015 Artifact Evaluation by AE committee Nov 13 -- December 13, 2016. Final paper due December 15, 2016 PPoPP is a forum for leading work on all aspects of parallel programming, including theoretical foundations, techniques, languages, compilers, runtime systems, tools, and practical experience. In the context of the symposium, "parallel programming" encompasses work on concurrent and parallel systems (multicore, multi-threaded, heterogeneous, clustered, and distributed systems; grids; clouds; and large scale machines). Given the rise of parallel architectures in the consumer market (desktops, laptops, and mobile devices), PPoPP is particularly interested in work that addresses new parallel workloads, techniques, and tools that attempt to improve the productivity of parallel programming, and work towards improved synergy with such emerging architectures. Specific topics of interest include (but are not limited to): + Compilers and runtime systems for parallel and heterogeneous systems + Concurrent data structures + Development, analysis, or management tools + Fault tolerance for parallel systems + Formal analysis and verification + High-performance / scientific computing + Middleware for parallel systems + Parallel algorithms + Parallel applications and frameworks + Parallel programming languages + Parallel programming theory and models + Parallelism in non-scientific workloads: web, search, analytics, cloud + Performance analysis, debugging and optimization + Programming tools for parallel and heterogeneous systems + Software engineering for parallel programs + Software for heterogeneous architectures + Software productivity for parallel programming + Synchronization and concurrency control + Task-parallel libraries Papers should report on original research relevant to parallel programming, and should contain enough background materials to make them accessible to the entire parallel programming research community. Papers describing experience should indicate how they illustrate general principles; papers about parallel programming foundations should indicate how they relate to practice. Poster submissions should meet similar criteria for originality and relevance, but may present emerging ideas or results that are not yet sufficiently developed for a full paper. Paper Submission All submissions are due August 1, 2017 and must be made electronically through the conference web site and include an abstract (100--400 words), author contact information, the full list of authors and their affiliations. Full paper submissions must be in PDF formatted for US letter size paper. No extensions will be granted. Papers should contain a maximum of 11 pages of single-spaced, minimum 10pt font, two-column text, NOT INCLUDING references. There is no page limit for references and they must include the name of all authors (not {et. al.}). Submission is double blind and authors will need to identify any potential conflicts of interest with PC and Extended Review Committee members, as defined here:http://www.sigplan.org/Resources/Policies/Review/ (ACM SIGPLAN policy). Detailed instructions for electronic submission and other important ACM SIGPLAN Policies will be posted on the PPoPP conference web sitehttp://ppopp.org. For additional information regarding paper submissions, please contact the Program Chair, Lawrence Rauchwerger <rwerger(a)tamu.edu>. Poster submissions must conform to the same format restrictions, but may not exceed 2 pages in length. Paper submissions that are not accepted for regular presentations will automatically be considered for posters; authors who do not want their paper considered for the poster session should indicate this in their paper submission. Two-page summaries of posters will be included in the conference proceedings. Artifact evaluation has been included in PPoPP 2015 and PPoPP 2016, and will be continued in PPoPP 2017. Authors of accepted papers will be invited to formally submit their supporting materials to the Artifact Evaluation process. The Artifact Evaluation process is run by a separate committee whose task is to assess how the artifacts support the work described in the papers. This submission is voluntary and will not influence the final decision regarding the papers. Papers that go through the Artifact Evaluation process successfully will receive a seal of approval printed on the papers themselves. Authors of accepted papers are encouraged (but not obliged) to make these materials publicly available upon publication of the proceedings, by including them as source materials in the ACM Digital Library. AUTHORS TAKE NOTE: The official publication date is the date the proceedings are made available in the ACM Digital Library. This date may be up to two weeks prior to the first day of your conference. The official publication date affects the deadline for any patent filings related to published work. (For those rare conferences whose proceedings are published in the ACM Digital Library after the conference is over, the official publication date remains the first day of the conference.) Tutorials / Workshops Proposals are solicited for tutorials and workshops to be held immediately before the conference. Interested individuals are invited to contact the Workshops Chair and the Tutorials Chair Rajkishore Barik <rajkishore.barik(a)intel.com> WORKSHOPS \& TUTORIALS DEADLINES: Proposals: August 31, 2016. Notification: 2 weeks after submission (latest: September 14, 2016). Dates: February 4--5, 2017. Organizing Committees ----------------------------- General Chair: Vivek Sarkar Rice University Program Chair: Lawrence Rauchwerger Texas A&M University Workshops & Tutorials Chair: Rajkishore Barik Intel

1 0