August 2016 - hpc-announce - mailman3.cels.anl.gov

(Deadline Extended to 22/08) Australasian Symposium on Parallel and Distributed Computing - SCI/EI Journal Opportunities
by Xiao Liu 08 Aug '16

08 Aug '16

15th Australasian Symposium on Parallel and Distributed Computing (AusPDC2017) AusPDC 2017 (http://www.ozcom.org/auspdc2017/) will be held in Geelong Australia in conjunction with Australasian Computer Science Week (http://acsw2017.deakin.edu.au/) January 31 - February 3, 2017, during the season of Australian Open. News Updated: Due to numerous requests from authors, the paper submission deadline has been extended to 22 August. Journal special issue opportunities are available, please visit http://acsw2017.deakin.edu.au/special-issue-journals/ Scope of the Symposium In 2010, AusGrid event was broadened to include all aspects of parallel and distributed computing and hence was called as Australasian Symposium on Parallel and Distributed Computing (AusPDC). Following a couple of successful events, it comes to the 15th this year in the series. In both New Zealand and Australia parallel and distributed computing has been recognised as strategic technologies for driving their moves towards knowledge economies. A number of projects and initiatives are underway in both countries in these areas. There is a natural interest in tools which support collaboration and access to remote resources given the challenges of the countries location and sparse populations. Topics of interest for the symposium include (but not limited to): Cloud computing Grid and Cluster computing Big Data processing and analytics Data storage, placement and replication Multi-core systems Peer-to-peer computing GPUs and other forms of special purpose processors Service computing and workflow management Managing large distributed data sets Middleware and tools Performance evaluation and modeling Datacentre and Interconnection networks Performance accelerators Problem-solving environments Parallel programming models, languages and compilers Operating systems and runtime systems Fog/edge computing and software defined networks Mobile, sensor networks and Internet of things Resource scheduling and load balancing Data mining and machine learning Computational Science and Engineering Agent-based computing Reliability, security, privacy and dependability e-Science and e-Health Applications The symposium is primarily targeted at researchers from Australia and New Zealand, however in the spirit of parallel and distributed computing, which aims to enable collaboration of distributed virtual organizations, we encourage papers and participation from international researchers. Paper Submission The proceedings of the symposium will be published by ACM (EI Index) together with ACSW 2017. Papers should be formatted according to ACM conference paper formatting guidelines ACM SIG Proceedings Templates. The following guidelines must be met for all submissions: Submissions must be in English. Submissions must not exceed 10 pages for full papers and 4 pages for short papers. Submissions must be in PDF format. Other formats will not be accepted. Submissions must clearly state the problem being addressed, the goal of the work, the results achieved, and the relation to other work. Submissions must be original contributions that have not been published previously, nor already submitted to other conferences or journals in parallel with this conference. Authors must choose the appropriate satellite conference or workshop for your submission Papers are to be submitted via the ACSW 2017 Easy Chair Submission Site. Upon logging into the system, please select “New Submission”, then select "Australasian Symposium on Parallel and Distributed Computing" track and proceed through the steps for submission. Every submission will be reviewed by a minimum of three members of the program committee. Important Dates Paper submissions due : August 22, 2016 (Extended) Author notification: October 17, 2016 Camera-ready full papers due: November 7, 2016. Committee General Co-Chairs Albert Zomaya The University of Sydney, Australia Wanlei Zhou Deakin University, Australia Jinjun Chen University of Technology, Sydney, Australia Program Committee Co-Chairs Xiao Liu Deakin University, Australia Dong Yuan The University of Sydney, Australia Publicity Co-Chairs Fang Dong Southeast University, China Wei Li The University of Sydney, Australia Publication Co-Chairs Qiang He Swinburne University of Technology, Australia Wei Bao The University of Sydney, Australia Local Organization Chair Longxiang Gao Deakin University, Australia Program Committee Members David Abramson Monash University, Australia Peter Bertok RMIT, Australia Rajkumar Buyya University of Melbourne, Australia Mingsong Chen East China Normal University, China Phoebe Chen La Trobe University, Australia Lizhen Cui Shandong University, China Fang Dong Southeast University, China Xiaoliang Fan Lanzhou University, China Haiwu He Chinese Academy of Sciences, China Qiang He Swinburne University of Technology Zhiyi Huang Otago University, NZ Wayne Kelly Queensland University of Technology, Australia Young Choon Lee Macquarie University, Australia Weifa Liang Australian National University, Australia Li Pan Shandong University, China Jun Shen University of Wollongong, Australia Michael Sheng The University of Adelaide, Australia Sheng Wen Deakin University, Australia Andrew Wendelborn The University of Adelaide, Australia Yang Xiang Deakin University, Australia Jingling Xue The University of New South Wales, Australia Jun Yan University of Wollongong, Australia Yun Yang Swinburne University of Technology, Australia Rui Zhang The University of Melbourne, Australia Xuyun Zhang The University of Auckland Albert Zomaya The University of Sydney, Australia Steering Committee David Abramson Monash University, Australia Rajkumar Buyya University of Melbourne, Australia Jinjun Chen (Vice Chair) Swinburne University of Technology, Australia Paul Coddington University of Adelaide, Australia Andrzej Goscinski (Chair) Deakin University, Australia Kenneth Hawick Massey University, NZ John Hine Victoria University of Wellington, NZ Rajiv Ranjan University of NSW, Australia Wyne Kelly Queensland University of Technology, Australia Paul Roe Queensland University of Technology, Australia Andrew Wendelborn University of Adelaide, Australia _________________________ Dr. Xiao Liu BMgt, MMgt, PhD Senior Lecturer - Information Technology (International Partnerships) School of Information Technology, Deakin University, 221 Burwood Hwy, Burwood, VIC 3125. Ph: +61 3 92445428<tel:%2B61%203%2092445428> e: xiao.liu(a)deakin.edu.au<mailto:[email protected]> office: T2.06.4, Melbourne Burwood Campus w: http://www.deakin.edu.au/profiles/xiao-liu Important Notice: The contents of this email are intended solely for the named addressee and are confidential; any unauthorised use, reproduction or storage of the contents is expressly prohibited. If you have received this email in error, please delete it and any attachments immediately and advise the sender by return email or telephone. Deakin University does not warrant that this email and any attachments are error or virus free.

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Deadline extension - HPGDMP16 Workshop at SC16
by Toyotaro Suzumura 08 Aug '16

08 Aug '16

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In-Memory and In-Storage Computing with Emerging Technologies workshop at PACT 2016 - Call for Participation
by Albert Cohen 05 Aug '16

05 Aug '16

** CALL FOR PARTICIPATION In-Memory and In-Storage Computing with Emerging Technologies workshop In conjunction with 25th International Conference on Parallel Computing and Compilation Techniques PACT 2016 http://pactconf.org/in-memory-and-in-storage-computing-with-emerging-techno… Haifa, Israel, September 11, 2016. In-Memory and In-Storage Computing with Emerging Technologies workshop invites you to share your research and creative endeavors with your colleagues. PACT 2016 is open for registration. Early registration lasts until August 15th. Student travel grants can be requested until July 25th. We are delighted to have Prof. Uri Weiser of Technion and Prof. Engin Ipek of Rochester University as our keynote speakers! Our program features 6 selected papers on a variety of subjects including computer architecture and algorithms based on resistive memory technologies such as memristors, RRAM, PCM, 3D Xpoint, STT-MRAM and others. Authors will present a wide range of potential applications including digital computing, non-volatile storage with processing capabilities, neuromorphic computing, etc. We will further discuss the use of emerging technologies as an enabler of the next generation of new architectures that address the major shortcomings of todayï¿½s conventional high-performance computing such as latency, energy, power efficiency and scalability. The workshop will take place in the Dan Carmel Hotel in Haifa, Israel, overlooking the Mediterranean Sea. Organizing Committees: ------------------------------ General Chairs: Shahar Kvatinsky, Technion ï¿½ Israel Institute of Technology, Israel (shahar(a)ee.technion.ac.il <mailto:[email protected]>) Leonid Yavits, Technion ï¿½ Israel Institute of Technology, Israel (yavits(a)tx.technion.ac.il <mailto:[email protected]> Program Committee: Albert Cohen, INRIA. Mattan Erez, UT Austin. Dietmar Fey, FAU. Said Hamdioui, TU Delft. Engin Ipek, University of Rochester. Onur Mutlu, CMU. Moin Qureshi, Georgia Tech. Ronny Ronnen, Intel. Uri Weiser, Technion. Yuan Xie, UC Santa Barbara.

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CFP: EduHPC-16 at SC, Salt Lake City: Workshop on Education for High-Performance Computing
by Sushil K. Prasad 05 Aug '16

05 Aug '16

EduHPC-16: Workshop on Education for High-Performance Computing *Mon, Nov 14, 2016 * *Time: 2:00 PM - 5:30 PM* Workshop Website <http://grid.cs.gsu.edu/~tcpp/curriculum/?q=eduhpc16> Held in conjunction with SC-16: The International Conference on High Performance Computing, Networking, Storage, and Analysis <http://www.sighpc.org/> Nov 13-18, 2016 http://sc16.supercomputing.org *CALL FOR PAPERS* Parallel and Distributed Computing (PDC) along with High Performance Computing(HPC) has become pervasive, from supercomputers and server farms containing multicore CPUs and GPUs, to individual PCs, laptops, and mobile devices. Even casual users of computers now depend upon parallel processing. Thus it is important for every computer user (*and especially every programmer*) to understand how parallelism and distributed computing affect problem solving. It is essential for educators to impart a range of PDC and HPC knowledge and skills at multiple levels within the educational fabric woven by Computer Science (CS), Computer Engineering (CE), and related computational curricula. Companies and laboratories need people with these skills, and, as a result, they are finding that they must now engage in extensive on-the-job training. Nevertheless, rapid changes in hardware platforms, languages, and programming environments increasingly challenge educators to decide what to teach and how to teach it, in order to prepare students for careers that are increasingly likely to involve PDC and HPC. This workshop invites unpublished manuscripts from academia, industry, and government laboratories on topics pertaining to the needs and approaches for augmenting undergraduate and graduate education in Computer Science and Engineering, Computational Science, and computational courses for both STEM and business disciplines with PDC and HPC concepts. The workshop is particularly dedicated to bringing together stakeholders from industry (both hardware vendors and employers), government labs, funding agencies, and academia in the context of SC-16, so that each can hear the challenges faced by others, can learn the various approaches to addressing these challenges, and can have opportunities to exchange ideas and solutions. In addition to contributed talks, this workshop will feature invited talks on opportunities for collaboration, resource sharing, educator training, internships, and other means of increasing cross-fertilization between industry, government, and academia. Proposals for panels and special sessions are also welcome. *KEYNOTE:* The keynote address will be delivered by Dr. Janice E. Cuny of the U.S. National Science Foundation. *BEST PAPER AWARD:* NVIDIA Corporation has donated a Tesla K40 to be presented to the author(s) of the Best Paper, as selected by the Program Committee. Plans include securing arrangements with a journal for a special issue on PDC/HPC Education to which authors of selected papers will be invited to submit extended versions of their workshop papers. This effort is in coordination with the NSF/TCPP curriculum initiative on Parallel and Distributed Computing <http://www.cs.gsu.edu/~tcpp/curriculum/?q=home> and the Center for Parallel and Distributed Computing Curriculum Development and Educational Resources (CDER). Topics of interest include, but are not limited to: 1. Pedagogical issues in incorporating PDC and HPC in undergraduate and graduate education, especially in core courses. 2. Novel ways of teaching PDC and HPC topics. 3. Experience with incorporating PDC and HPC topics into core CS/CE courses. 4. Pedagogical tools, programming environments, infrastructures, languages, and projects for PDC and HPC. 5. Employers’ experiences with and expectation of the level of PDC and HPC proficiency among new graduates. 6. Educational resources based on higher level programming languages such as PGAS, X10, Chapel, Haskell, Python and Cilk, and emerging environments such as CUDA, OpenCL, OpenACC, and Hadoop. 7. Parallel and distributed models of programming/computation suitable for teaching, learning and workforce development. *SUBMISSION GUIDELINES:* *Papers:* Authors should submit 6-8 page papers in pdf format through the EasyChair submission site at https://easychair.org/conferences/?conf=eduhpc16. Select its “Paper” track. Submissions should be formatted as single-spaced, double-column pages (ACM format), including figures, tables, and references. See style templates for details. Accepted papers will be published in the conference workshop proceedings. Author Instructions <http://grid.cs.gsu.edu/~tcpp/curriculum/sites/default/files/Author_Instruct…> LaTex Package <http://www.acm.org/sigs/publications/proceedings-templates#aL2> Word Template <http://www.acm.org/sigs/publications/pubform.doc> *IMPORTANT DATES:* August 26, 2016: Paper submission deadline September 26, 2016: Author notification October 10, 2016: Camera-ready paper deadline *ORGANIZATION:* *Organizing Committee:* Sushil Prasad, Georgia State University Robert Geist, Clemson University Anshul Gupta, IBM Research Arnold Rosenberg, Northeastern University Alan Sussman, University of Maryland Charles Weems, University of Massachusetts *Workshop Chair:* Sushil K. Prasad, Georgia State University *Program Chair:* Robert Geist, Clemson University *Proceedings Chair:* Satish Puri, Georgia State University *Program Committee:* Robert Geist (Progam Chair), Clemson University Joel Adams, Calvin College Martin Burtscher, Texas State University Ioana Banicescu, Mississippi State University Martina Barnas, Indiana University Virendra Bhavsar, University of New Brunswick David Bunde, Knox College Florina Ciorba, University of Basel Brian Dean, Clemson University Debzani Deb, Winston-Salem State University Victor Gergel, Nizhni Novgorod State University Nasser Giacaman, University of Auckland Domingo Gimenez , University of Murcia Ganesh Gopalakrishnan, University of Utah Ajay Gupta, University of Western Michigan Anshul Gupta, IBM Research Jason Hallstrom, Florida Atlantic University David Juedes, Ohio University David Kaeli, Northeastern University Helen Karatza, Aristotle University of Thessaloniki Karen Karavanic, Portland State University Eileen Kraemer, Clemson University Suzanne Matthews, United States Military Academy Henry Neeman, University of Oklahoma Peter Pacheco, University of San Francisco Manish Parashar, Rutgers University Sathya Peri, IIT Hyderabad Cynthia Phillips, Sandia National Laboratories Satish Puri, Georgia State University Thomas Rauber, University Bayreuth Arnold Rosenberg, Northeastern University Gudula Ruenger, Chemnitz University of Technology Erik Saule, University of North Carolina at Charlotte Jawwad Shamsi, FAST National University of Computer and Emerging Sciences Chi Shen, Kentucky State University Suzanne Shontz, University of Kansas Rudrapatna Shyamasundar, TIFR Murali Sitaraman, Clemson University Leonel Sousa, Universidade de Lisboa Pradip Srimani, Clemson University Srishti Srivastava, University of Southern Indiana Nitin Sukhija, Mississippi State University Alan Sussman, University of Maryland Dominique Thiebaut, Smith College Denis Trystram, Grenoble University Susan Wang, Mills College Charles Weems, University of Massachusetts, Amherst

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SC16 Workshop: DEADLINE EXTENDED: 3rd Workshop on Accelerator Programming using Directives (WACCPD)
by Sunita Chandrasekaran 05 Aug '16

05 Aug '16

<Scroll down for more details on the Best Paper Award and Journal Special Issue> Third Workshop on Accelerator Programming using Directives (WACCPD) http://waccpd.org/ In cooperation with ACM SIGHPC Monday, November 14, 2016 co-located with SC16: The International Conference for High Performance Computing, Networking, Storage and Analysis <http://sc16.supercomputing.org/> November 13-18, 2016 *Call for Papers* One of the hard realities is that the hardware continues to evolve very rapidly with diverse memory subsystems or cores with different ISAs or accelerators of varied types. The HPC community is in constant need for sophisticated software tools and techniques to port legacy code to these emerging platforms. Maintaining a single code base yet achieving performance portable solution continues to pose a daunting task. Directive-based programming models such as OpenACC, OpenMP tackle this issue by offering scientists a high-level approach to accelerate scientific applications and develop performance portable solutions. This enables accelerators to be first-class citizens for HPC! To address the rapid pace of hardware evolution, developers continue to explore and add richer features to the various (parallel) programming standards. Domain scientists continue to explore the programming and tools space while preparing themselves for future Exascale systems. This workshop aims to solicit papers that explore innovative language features – their implementations, compilation & runtime scheduling techniques, performance optimization strategies, auto-tuning tools exploring the optimization space and so on. WACCPD has been one of the major forums for bringing together the users, developers and tools community to share their knowledge and experiences of using directives and similar approaches to program emerging complex systems. *Important Deadlines* - Submission Deadline: August 22nd, 2016 AoE, August 29th, 2016 AoE - Author notification: September 30th, 2016 - Camera Ready papers due: October 2nd, 2016 AoE * Topics of interest for workshop submissions include (but are not limited to):* - Compiler and Runtime support for current and emerging architectures - Language-based extensions - Memory management using directives - Performance evaluation and lessons learnt - Auto-tuning and optimization strategies - Programming experience porting applications in any domain - Extensions to and shortcomings of current accelerator directives APIs - Hybrid heterogeneous or many-core programming with accelerator directives with other models (i.e. OpenMP, MPI, OpenSHMEM) - Scientific libraries interoperability with accelerator directives - Experiences in implementing compilers for accelerator directives on newer architectures - Low level communication APIs or runtimes that support accelerator directives - Asynchronous execution and scheduling (heterogeneous tasks) - Power / energy studies - Static analysis and verification tools - Modeling and performance analysis tools - Benchmarks and validation suites *Best Paper Award:* NVIDIA has generously offered to sponsor the ‘Best Paper Award’ with NVIDIA’s newest *Pascal compute capable card*. This award will be given to the author(s) of the paper selected by the Technical Program Committee and the Program Chairs. The award will be determined from viewpoints of the technical and scientific merits, impact on the science and engineering of the research work and the clarity of presentation of the research contents in the paper. *Paper Submission Guidelines* Submissions are limited to 10 pages. They must follow the ACM format (see http://www.acm.org/sigs/publications/proceedings-templates) The 10-page limit includes figures, tables, and appendices, but does not include references, for which there is no page limit. Papers should be submitted electronically via EasyChair: https://easychair.org/conferences/?conf=waccpd2016 Submitted papers should not have appeared in or be under consideration for a different workshop, conference or journal. It is also expected that all accepted papers will be presented at the workshop by one of the authors. *Journal Special Issue* A Special issue of the International Journal of High Performance Computing and Networking <http://www.inderscience.com/jhome.php?jcode=ijhpcn>(IJHPCN) titled ‘High Level Programming Approaches for Accelerators’ will feature invited contributions from the workshop. These special issues will be edited by Sunita Chandrasekaran and Guido Juckeland. The submission to this special issue is by invitation only. * Steering Committee:* - Barbara Chapman (StonyBrook University, cOMPunity, USA) - Oscar Hernandez (ORNL, USA) - Kuan-Ching Li (Providence University, Taiwan) - Satoshi Matsuoka (Titech, Japan) - Duncan Poole (OpenACC) - Thomas Schulthess (ORNL, USA) - Jeff Vetter (ORNL, USA) *Program Co-Chairs:* - Guido Juckeland, Helmholtz-Zentrum Dresden-Rossendorf, Dresden, Germany - Sunita Chandrasekaran, University of Delaware, Newark, DE, USA *Program Committee:* - Christopher Bergstorm (Pathscale) - James Beyer (NVIDIA, USA) - Henri Callandra (TOTAL, USA) - Robert Dietrich (TU Dresden, Germany) - Fernanda Foertter (ORNL, USA) - Mark Govette (NOAA, USA) - Georg Hager (FAU, Germany) - Jeff Hammond (Intel, USA) - Christian Iwainsky (TU Darmstadt, Germany) - Arpith J. Jacob (IBM, USA) - Henri Jin (NASA-Ames, USA) - Wayne Joubert (ORNL, USA) - Michael Klemm (Intel, Germany) - Seyong Lee (ORNL, USA) - CJ Newburn (NVIDIA, USA) - Antonio J. Pena (BSC, Spain) - William Sawyer (CSCS, Switzerland) - Thomas Schwinge (MentorGraphics, Germany) - Ray Sheppard (Indiana University, USA) - Peter Steinbach (Scionics, Germany) - Christian Terboven (RWTH Aachen University, Germany) - Michael Wolfe (NVIDIA, USA) *Keynote Speaker:* *Jack Wells*, the Director of Science for the Oak Ridge Leadership Computing Facility (OLCF), will give the Keynote at the workshop. OLCF is a DOE Office of Science national user facility, and the Titan supercomputer is located at the Oak Ridge National Laboratory (ORNL). Wells is responsible for the scientific outcomes of the OLCF’s user programs. Wells has previously lead both ORNL’s Computational Materials Sciences group in the Computer Science and Mathematics Division and the Nanomaterials Theory Institute in the Center for Nanophase Materials Sciences. Prior to joining ORNL as a Wigner Fellow in 1997, Wells was a postdoctoral fellow within the Institute for Theoretical Atomic and Molecular Physics at the Harvard-Smithsonian Center for Astrophysics. Wells has a Ph.D. in physics from Vanderbilt University, and has authored or co-authored over 80 scientific papers and edited 1 book, spanning nanoscience, materials science and engineering, nuclear and atomic physics computational science, applied mathematics, and text-based data analytics. *Contact: * Pls email organizers(a)waccpd.org for any questions

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REMINDER: PGAS Applications Workshop Call for Submissions
by Smith, Lauren L CIV (US) 04 Aug '16

04 Aug '16

CALL FOR PAPERS PAW16: PGAS Applications Workshop Caution-http://sourceryinstitute.github.io/PAW/ November 14, 2016 - Salt Lake City, Utah Held in conjunction with SC16 Caution-http://sc16.supercomputing.org/ In cooperation with SIGHPC SUMMARY The race towards Exascale computing is on, and a lot of stress is put on researchers to break the boundaries of productivity and efficiency imposed by traditional programming models. Partitioned Global Address Space (PGAS) languages are an effective alternative, and the most promising path towards sustainable programming environments for exascale machines. Languages such as UPC, Fortran, Chapel, and X10 are now more widely available than ever, thanks to increased support from vendors and open-source communities. PGAS models also take the form of meta-languages and libraries, such as Unified Parallel C++ (UPC++), Co-Array C++, OpenSHMEM, MPI-3 and Global Arrays. These have the benefit of being integrated with existing languages, simplifying the learning curve for existing programmers. SUMMARY The increasing availability of PGAS compilers and support software opens up more opportunities than ever for researchers and developers to test new strategies and port applications to more demanding requirements. SCOPE AND AIMS The scope of the PAW workshop is to provide a forum for exhibiting case studies of PGAS programming models in the context of real-world applications as a means of better understanding practical applications of PGAS technologies. We encourage the submission of papers and talks detailing practical PGAS applications, including characterizations of scalability and performance, of expressiveness and programmability, as well as any downsides or areas for improvement in existing PGAS models. In addition to informing other application programmers about the potential that is available through PGAS programming, the workshop is designed to communicate these experiences to compiler vendors, library developers, and system architects in order to achieve broader support for PGAS programming across the community. TOPICS Topics include, but are not limited to: * Novel application development using the PGAS model * Real-world examples demonstrating performance, compiler optimization, error checking, and reduced software complexity. * Performance evaluation of applications running under PGAS * Algorithmic models enabled by PGAS model * Compiler and runtime environments * Libraries using/supporting PGAS and applications * Benefits of hardware abstraction and data locality on algorithm implementation. DATES * Submission Deadline: August 13, 2016 * Author Notification: September 1, 2016 * Camera Ready: October 1, 2016 * Workshop Date: November 14, 2016 SUBMISSION Submissions are solicited in two categories: * Full-length papers presenting novel research results: Full-length papers will be published in the workshop proceedings in cooperation with SIGHPC. Submitted papers must be original work that has not appeared in and is not under consideration for another conference or a journal. Papers shall not exceed eight (8) pages including text, appendices, and figures. References are not included. * Extended abstracts summarizing published/preliminary results: Extended abstracts will be evaluated separately and are not intended to prevent the work from being submitted to other forums for publication. Extended abstracts shall not exceed four (4) pages. Submissions shall be submitted through EasyChair (Caution-https://easychair.org/conferences/?conf=paw16) they must conform to ACM Guidelines (Caution-https://www.acm.org/publications/proceedings-template) Accepted full-length papers will be given longer presentation slots at the workshop than the abstract-only option. WORKSHOP CHAIR * Karla Morris - Sandia National Laboratory ORGANIZING COMMITTEE * Bradford L. Chamberlain - Cray Inc. * Salvatore Filippone - Cranfield University * Bill Long - Cray Inc. * Katherine A. Yelick - Lawrence Berkeley National Laboratory * Yili Zheng - Lawrence Berkeley National Laboratory PROGRAM COMMITTEE CHAIR * Bill Long - Cray Inc. PROGRAM COMMITTEE CO-CHAIR * Salvatore Filippone - Cranfield University PROGRAM COMMITTEE * Gheorghe Almasi - IBM * Bradford L. Chamberlain - Cray Inc. * Daniel Chavarria - Pacific Northwest National Laboratory * Bert de Jong - Lawrence Berkeley National Laboratory * Salvatore Filippone - Cranfield University * Tarek El-Ghazawi - George Washington University * David Grove - IBM * Jeff Hammond - Intel * Oscar Hernandez - Oak Ridge National Laboratory * Amir Kamil - University of Michigan * John Mellor-Crummey - Rice University * Karla Morris - Sandia National Laboratory * Nick Park - DoD * Damian W. I. Rouson - Sourcery Institute * Lauren Smith - DoD * Katherine A. Yelick - Lawrence Berkeley National Laboratory * Yili Zheng - Lawrence Berkeley National Laboratory In case of questions please email us at: paw16(a)cranfield.ac.uk ----------------------- Lauren L. Smith HPC Computer Science Researcher lauren.l.smith18.civ(a)mail.mil 240-373-6489

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CfP: International Conference on Networked Systems 2017 (NetSys'17)
by Yang Chen 04 Aug '16

04 Aug '16

International Conference on Networked Systems 2017 March 13-17, 2017 – Göttingen, Germany * In Cooperation with ACM SIGCOMM * IEEE Communications Society Technical Co-Sponsorship CALL FOR PAPERS The Conference on Networked Systems (NetSys 2017) provides an international forum for engineers and scientists in academia, industry, and government to discuss recent innovations in the realm of networked systems – including aspects of networking, distributed systems, communications, middleware, and applications. NetSys conference proceedings will be published in IEEE Xplore®. NetSys is a biennial event that originates from the key scientific conference on networked systems in German-speaking countries KiVS (Kommunikation in Verteilten Systemen) – which was initiated 37 years ago and has international orientation since 2013. NetSys is organized by the special interest group “Communication and Distributed Systems” (KUVS), which is anchored both in the German Computer Science society (Gesellschaft für Informatik (GI)) and in the Information Technology society (Informationstechnische Gesellschaft im VDE (ITG)), with IEEE technical co-sponsorship and ACM SIGCOMM in cooperation status preliminarily approved. NetSys solicits submission of high-quality, original scientific papers presenting novel research on the wide range of networked systems, including but not limited to: Network architectures and protocols Smart grid Transport- and application-layer protocols Information-centric networking, content distribution and retrieval Peer-to-peer and overlay networks SoA, web services, and mobile services Software-defined networking and network/functionality virtualization Consistency, reliability, availability, and programming support Mobile, ad-hoc, opportunistic, vehicular and sensor networks Social networks, social computing, data-intensive computing (big data) Middleware architectures and platforms for networked systems Methods for design, implementation and analysis of networked systems Internet of Things (IoT) Cyber-physical systems Cloud computing, mobile cloud computing Green networks and green networked systems Network/cyber security and privacy Emerging networked applications Separate workshops, tutorials, poster/demonstrations, and a doctoral forum will complement the technical sessions. Manuscripts will undergo a thorough process of peer reviews by at least three members of the technical program committee. All papers accepted in the main conference, selected workshops and the PhD forum will be included in the conference proceedings, which will be made available at the conference. Submission implies that at least one author will register and attend the conference to present the publication if the paper is accepted. Important Dates Paper Registration: August 25, 2016 Paper Submission: September 1, 2016 Author Notification: November 13, 2016 Final Manuscript: December 20, 2016 Submission guidelines All submissions must be original, unpublished, and not considered elsewhere for publication. Papers must be 8 pages long or less, including references, figures and tables (at least 10pt font, 2-column format). IEEE LaTeX and Microsoft Word templates, as well as formatting instructions, are available online on this website. Contributions should be submitted electronically as PDF, using the IEEE conference publishing template, via the conference submission website: https://edas.info/newPaper.php?c=21785. Each paper will undergo a thorough process of peer reviews by at least three members of the technical program committee. All papers accepted in the main conference, selected workshops and the PhD forum will be included in the conference proceedings, which will be made available at the conference. Submission implies that at least one author will register and attend the conference to present the publication if the paper is accepted. organization committee General Chairs: Volker Hilt (Bell Labs, Nokia) Dieter Hogrefe University of Göttingen) TPC Chairs: Xiaoming Fu (University of Göttingen) Michael Welzl (University of Oslo) Local Organization Committee: Mayutan Arumaithurai (University of Göttingen) David Koll (Chair) (University of Göttingen) Federica Poltronieri (University of Göttingen) Carmen Scherbaum (University of Göttingen) Web Chair: Diego Lugones (Bell Labs, Nokia) Publications Chair: Ruichuan Chen (Bell Labs, Nokia) Publicity Chairs: Yang Chen (Fudan University) Yevgeni Koucheryavy (Tampere University of Technology) Martin Stiemerling (Darmstadt University of Applied Sciences) Workshops Chairs: Stephan Sigg (Aalto University) Lars Wolf (Technische Universität Braunschweig) Poster/Demo Chairs: Kurt Geihs (University of Kassel) Stefan Secci (University of Pierre and Marie Curie (Paris 6)) PhD Forum Chairs: Christian Becker (University of Mannheim) Oliver Hohlfeld (RWTH Aachen University)

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OpenMPCon Call for Participation
by Schmidl, Dirk 04 Aug '16

04 Aug '16

-------------------------------------------------------------------------- **** CALL FOR PARTICIPATION **** The 12th International Workshop on OpenMP (IWOMP) The 2nd OpenMP Developers Conference (OpenMPCon) Nara, Japan - October 3 through 7, 2016 http://iwomp2016.riken.jp http://openmpcon.org Early registration deadline: September 12 http://iwomp2016.riken.jp/registration The International Workshop on OpenMP (IWOMP) is an annual workshop dedicated to the promotion and advancement of all aspects of parallel programming with OpenMP. It is the premier forum to present and discuss issues, trends, recent research ideas, and results related to parallel programming with OpenMP. The 12th workshop will take place in Nara, Japan from October 5 to 7, featuring two keynotes and presentations of 24 peer-reviewed papers. As in the last year, a sister event, OpenMP Developers Conference (OpenMPCon), is co-located with IWOMP from October 3 to 5. The main focus of OpenMPCon is practical applications of OpenMP and other directive based languages. On Wednesday, October 5, tutorials on advanced topics such as programming GPUs, NUMA-aware data placement, and tasking are presented by leading experts: - James Beyer (NVIDIA) and Bronis R. de Supinski (LLNL), "Introduction to OpenMP Device Constructs" - Christian Terboven (RWTH Aachen) and Xavier Teruel (BSC), "Tasking and NUMA-Aware Programming" Visit http://iwomp2016.riken.jp and http://openmpcon.org for more details. Registration can be made at http://iwomp2016.riken.jp/registration. Discounted early registration is available until September 12. IWOMP16 General Chair: Naoya Maruyama (RIKEN AICS) OpenMPCon General Chair: Michael Klemm (OpenMP ARB CEO and Intel)

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ISPASS'17 Call For Papers
by Christina Delimitrou 03 Aug '16

03 Aug '16

[Apologies if you receive multiple copies of this CFP] --------------------------------------------------------------------------- ISPASS 2017 Call for Papers ========================================= The IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) provides a forum for sharing advanced academic and industrial research work focused on performance analysis in the design of computer systems and software. ISPASS 2017 will be held April 23 through 25, 2017 in California's wine country (San Francisco Bay Area). Authors are invited to submit previously unpublished work for possible presentation at the conference. Papers are solicited in fields that include the following: - Performance and power evaluation methodologies - Analytical modeling - Statistical approaches - Tracing and profiling tools - Simulation techniques - Hardware (e.g., FPGA) accelerated simulation - Hardware performance counter architectures - Power/Temperature/Variability/Reliability models for computer systems - Microbenchmark-based hardware analysis techniques - Performance and power analysis - Metrics - Bottleneck identification and analysis - Visualization - Power/Performance analysis of commercial and experimental hardware - General-purpose microprocessors - Multithreaded, multicore and many-core architectures - Accelerators and graphics processing units - Memory systems including storage class memory - Embedded and mobile systems - Enterprise systems and data centers - Supercomputers - Computer networks - Power/Performance analysis of emerging workloads and software - Software written in managed languages - Virtualization and consolidation workloads - Internet-sector workloads - Embedded, multimedia, games, telepresence - Bioinformatics, life sciences, security, biometrics - Deep learning and convolutional neural networks - Application and system code tuning and optimization - Confirmations or refutations of important prior results In addition to research papers, ISPASS welcomes tools and benchmarks papers. The conference is an ideal forum to publicize new tools and benchmarks to the community. These papers, which can detail tools and benchmarks in any of the above fields of interest, will be judged primarily on their potential impact and use than on their research contribution. See http://www.ispass.org for submission details. IMPORTANT DATES Paper abstract submission: October 7, 2016 Full submission: October 14, 2016 Rebuttal: January 13-16, 2017 Notification: January 30, 2017 Conference: April 23-25, 2017 General Chair: Suzanne Rivoire, Sonoma State University Program Committee Chair: Bronis R. de Supinski, LLNL Program Committee ----------------------------- Dorian Arnold, University of New Mexico Laura Carrington, San Diego Supercomputing Center Almadena Chtchelkanova, NSF Marcelo Cintra, Intel Jeanine Cook, Sandia National Laboratories Luiz DeRose, Cray Christina Delimitrou, Cornell University Andi Drebes, The University of Manchester Lieven Eeckhout, Ghent University Wendy Elsasser, ARM Nikos Hardavellas, Northwestern University David Hass, Broadcom Hillery Hunter, IBM Research Katherine Isaacs, University of Arizona Lizy John, University of Texas Samira Khan, University of Virginia Masaaki Kondo, The University of Tokyo David Lowenthal, University of Arizona Xiaosong Ma, Qatar Computing Research Institute Naoya Maruyama, RIKEN AICS Dimitrios Nikolopoulos, Queen’s University, Belfast Tapasya Patki, LLNL Indrani Paul, AMD Michael Pellauer, NVIDIA Fabrizio Petrini, Intel Suzanne Rivoire, Sonoma State University Valentina Salapura, IBM Research Yanos Sazeides, University of Cyprus Thomas Scogland, LLNL Kelly Shaw, University of Richmond Estela Suarez, Jülich Supercomputing Centre Linglia Tang, University of Michigan Michela Taufer, University of Delaware Valerie Taylor, Texas A&M University Eric Van Hensbergen, ARM Jeffrey S. Vetter, Oak Ridge National Laboratory Vince Weaver, University of Maine Thomas F. Wenisch, University of Michigan

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CfP: Inaugural HPC Systems Professionals Workshop
by Randy Herban 03 Aug '16

03 Aug '16

Inaugural HPC Systems Professionals Workshop HPCSYSPROS16 Submission Deadline: August 19th, 2016 Submission Website: https://easychair.org/conferences/?conf=hpcsyspros16 Workshop Website: http://hpcsyspros.lsu.edu/ Contact: hpcsyspros(a)hpcsyspros.lsu.edu Supercomputing systems present complex challenges to personnel who design, deploy and and maintain these systems. Standing up these systems and keeping them running require novel solutions that are unique to high performance computing. The success of any supercomputing center depends on stable and reliable systems, and HPC Systems Professionals are crucial to that success. The Inaugural HPC Systems Professionals Workshop will bring together systems administrators, systems architects, and systems analysts in order to share best practices, discuss cuttingedge technologies, and advance the stateofthepractice for HPC systems. Submissions are encouraged that discuss all aspects of HPC systems design, implementation, maintenance, and security. Topics of interest include, but are not limited to: * Cluster, configuration, or software management * Performance tuning/Benchmarking * Resource manager and job scheduler configuration * Monitoring/Meantimetofailure/ROI/Resource utilization * Virtualization/Clouds * Designing and troubleshooting HPC interconnects * Designing and maintaining HPC storage solutions * Cybersecurity and data protection Authors are invited to submit original, highquality papers with an emphasis on solutions that can be implemented by other members of the HPC systems community. Papers should be submitted in PDF format and should not exceed 5 pages including tables, figures and appendices, but excluding references. All submissions should be formatted according to the ACM SIG Proceedings template which can be found at https://www.acm.org/publications/proceedingstemplate. Similar to the SC16 policy, margins and font sizes should not be modified. All submissions should be submitted electronically through EasyChair. Proceedings will be published in ScholarWorks hosted by Indiana University, and authors will retain full rights to their work. Important Dates Submission Deadline August 19th Acceptance Notifications September 8th Camera Ready Papers October 7th Inaugural HPC Systems Professionals Workshop November 14th -- Randy Herban Program Manager Research Computing (RCAC) - ITaP

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