March 2017 - hpc-announce - mailman3.cels.anl.gov

2nd CFP for Intl. Workshop on Synergy of Parallel Computing, Optimization and Simulation (PaCOS 2017)
by Mohand MEZMAZ 07 Mar '17

07 Mar '17

CALL FOR PAPERS As part of The International Conference on High Performance Computing & Simulation (HPCS 2017) http://hpcs2017.cisedu.info or http://cisedu.us/rp/hpcs17 July 17 – July 21, 2017 Genoa, Italy Submission Deadline: March 19, 2017 Submissions could be for full papers, short papers, poster papers, or posters SCOPE AND OBJECTIVES Most real-world problems are complex and stochastic and, thus, hard to approach. Such problems originate from a wide range of areas including manufacturing and production, logistics and supply chain management, healthcare, and many more. Simulation and optimization have traditionally been considered separately as alternative approaches to deal with such problems. The recent advances in computational power have promoted the proliferation of hybrid techniques that combine both approaches. The challenge is to design efficient and effective hybridization mechanisms taking advantage of great details provided by simulation as well as the ability of optimization methods to provide (near-)optimal solutions. On the other hand, SO applications can/might become increasingly large (parameter, variable, and objective spaces) and complex (cross-disciplinary and mixed discrete-continuous optimization), requiring the use of parallel computing techniques for efficient and effective execution. However, the design and implementation of parallel SO methods raise several issues such as problem decomposition, parallel sampling, synchronization between simulation and optimization processes, load balancing, scalability, etc. This workshop seeks to provide an opportunity for researchers to present their original contributions on the joint use of advanced single- and multi-objective optimization methods, simulation and distributed and/or parallel multi/many- core computing, and any related issues. The PaCOS Workshop topics include the following: Topics related to synergy between Simulation and Optimization include, but not limited to: ● Statistical selection methods such as ranking and selection, and multiple comparison procedures; ● Black-box search methods that directly make use of the simulation estimates of the objective function like random search algorithms, simulation-based single- and multi-objective metaheuristics (e.g. local search or evolutionary algorithms) (also called simheuristics), probability distribution model–based methods; ● Meta-model based methods such as first- and second-order regression models and neural networks; ● Gradient-based methods like stochastic approximation, etc. ● Computational/theoretical studies reporting results on solving complex problems using SO techniques. ● SO applications including healthcare, manufacturing, logistics, biological applications, advanced big data analytics, engineering design, etc. ● Software frameworks for the design and implementation of SO techniques. Topics related to synergy between Simulation-Optimization and parallel computing include, but not limited to: ● Parallelization techniques and advanced data structures for SO methods. ● Parallel mechanisms for the hybridization of optimization and simulation. ● Implementation issues of parallel SO on multi-core processors, accelerators, clusters, grids/clouds, etc. ● Energy- and thermal-aware implementation of parallel SO methods. INSTRUCTIONS FOR PAPER SUBMISSIONS You are invited to submit original and unpublished research works on above and other topics related to synergy between parallel computing, optimization and simulation. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-po… for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. Submit a PDF copy of your full manuscript to the workshop EasyChair paper submission site at https://easychair.org/conferences/?conf=pacos2017. Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop. PROCEEDINGS Accepted papers will be published in the Conference proceedings. Instructions for final manuscript format and requirements will be posted on the HPCS 2017 Conference web site. It is our intent to have the proceedings formally published in hard and soft copies and be available at the time of the conference. The proceedings is projected to be included in the IEEE or ACM Digital Library and indexed in all major indexing services accordingly. SPECIAL ISSUE Plans are underway to have the best papers, in extended version, selected for possible publication in a journal as special issue. Detailed information will soon be announced and will be made available on the conference website. If you have any questions about paper submission or the symposium, please contact the symposium organizers. IMPORTANT DATES Paper Submissions: --------------------------------------------- March 19, 2017 Acceptance Notification: --------------------------------------- April 07, 2017 Camera Ready Papers and Registration Due by: ----------- May 03, 2017 Conference Dates: ---------------------------------------------- July 17 – 21, 2017 WORKSHOP ORGANIZERS Nouredine Melab Université Lille 1/INRIA Lille - Nord Europe/CNRS CRIStAL, Lille, France Phone: +33 3 59 57 78 86 Fax: +33 3 28 77 85 37 Email: nouredine.melab(a)univ-lille1.fr Peter Korošec Jožef Stefan Institute Ljubljana, Slovenia Phone: +386 1 477 3460 Email: peter.korosec(a)ijs.si Boris Naujoks TH Köln, University of Applied Sciences Gummersbach, Germany Phone: +49 2261 8196 6257

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[CFP] Second International Workshop on Enhancing Parallel Scientific Applications with Accelerated HPC (ESAA) 2017
by FRANCISCO JAVIER GARCIA BLAS 07 Mar '17

07 Mar '17

SECOND INTERNATIONAL WORKSHOP ON ENHANCING PARALLEL SCIENTIFIC APPLICATIONS WITH ACCELERATED HPC (ESAA 2017) to be held as part of EuroMPI/USA 2017 Chicago, USA, September 25-28, 2017 _____________________________________________________________________________ BACKGROUND Since 2011, the most powerful supercomputers systems ranked in the Top500 list are hybrid systems composed of thousands of nodes that includes CPUs and accelerators, as Xeon Phi and GPUs. Programming and deploying applications on those systems is still a challenging work, due to the complexity of the system and the need to mix several programming interfaces (MPI, CUDA, Intel Xeon Phi) in the same application. This Workshop is aimed to explore the state of the art of developing applications in accelerated massive HPC architectures, including practical issues of hybrid usage models with MPI, OpenMP, and other accelerators programming models. The idea is to publish novel work on the use of available programming interfaces (MPI, CUDA, Intel Xeon Phi) and tools for code development, application performance optimizations, application deployment on accelerated systems, as well as the advantages and limitations of accelerated HPC systems. Experiences with real-world applications, including scientific computing, numerical simulations, healthcare, energy, data-analysis, etc. are also encouraged. TOPICS Areas of interest of the workshop include, but are not limited to: Tools, libraries, and environments for accelerators. Hybrid and heterogeneous programming with MPI and accelerators. Performance evaluation scientific applications based on accelerators. Automatic performance tuning of scientific applications with accelerators. Integrating accelerators on existing HPC middlewares. Run-times for accelerators. Energy efficient HPC solutions based on accelerators. Storage cache solutions based on SSD accelerators. Parallel data analysis for MPI and SSD. Real-world scientific and engineering applications using accelerated HPC. Future trends and prospects for accelerated HPC. SCHEDULE, IMPORTANT DATES Submission: May 31st, 2017 Author notification: June 26th, 2017 Camera Ready papers due: July 20th, 2017 Conference: September 25th-28th, 2017 COMMITTEE (preliminary) Workshop Organizers: Dr. Javier Garcia-Blas. University Carlos III of Madrid, Spain. Prof. Jesus Carretero. University Carlos III of Madrid, Spain. Program Committee: Ivona Brandic. Vienna University of Technology, Austria Minyi Guo, Shanghai Jiao Tong University, China Francisco Igual Peña, Universidad Complutense, Spain Florin Isaila, Argonne National Labs, Chicago, USA Emmanuel Jeannot, INRIA, France Hai Jin, Huazhong University of Science and Technology, China Timothy K. Jones, University of Cambridge, UK Laurent Lefevre, INRIA, Ecole Normale Superieure of Lyon, University of Lyon, France Diego R. Llanos, University of Valladolid,Spain Dimitar Lukarski, Uppsala University, Sweden Svetozar Margenov, Bulgarian Academy of Sciences, Bulgaria Raffaele Montella, University of Napoli Parthenope, Italy Ravi S Nanjundiah, Indian Institute of Science in Bangalore, India Ariel Olesiak, Poznan Supercomputing and Networking Center, Poland Antonio J. Peña, Argonne National Labs, Chicago, USA Enrique S. Quintana-Orti, Universidad Jaume I de Castellon, Spain Matei Ripeanu, University of British Columbia, Canada Leonel Sousa, Instituto Superior Tecnico, Universidade de Lisboa, Portugal Alexander Supalov, INTEL, USA Rupa K. Thulasiram, University of Manitoba, Canada Manuel Ujaldon, Universidad de Malaga, Spain Roman Wyrzykowski, Czestochowa University of Technology, Poland Julius Zilinskas, Vilnius University, Lithuani Xingshe Zhou, Northwestern Polytech University, China PAPER SUBMISSION GUIDELINES Contributors are invited to submit a full paper as a PDF document not exceeding 6 pages in English. The title page should contain an abstract of at most 100 words and five specific, topical keywords. The paper must be formatted according to double-column ACM ICPS proceedings style. The usage of LaTeX for preparation of the contribution as well as the submission in camera ready format is strongly recommended. Style files can be found at www.acm.org/publications/icps-instructions/. All contributions will be fully peer reviewed by the program committee. Registration for EuroMPI/USA 2017 main conference is mandatory to attend workshops. The paper submission online system is open: www.easychair.org/conferences/?conf=esaa2017. -- ________________________________________________________ Dr. Javier García Blas Computer Architecture, Communications and Systems Area. Computer Science Department. UNIVERSIDAD CARLOS III DE MADRID Avda. de la Universidad, 30 28911 Leganés (Madrid), SPAIN e-mail: fjblas(a)inf.uc3m.es Phone:(+34) 916249143 FAX: (+34) 916249129 ________________________________________________________

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CFP APPMM workshop on multicore programming with special issue!
by Gabriele Mencagli 06 Mar '17

06 Mar '17

************************************************************************** APPMM 2017: a HPCS 2017 International Workshop Advancements in Parallel Programming Models and Frameworks for the Multi-/Many-core Era Date: 17-21, July 2017 Location: Genova, Italy Submission link: https://easychair.org/conferences/?conf=appmm2017 Workshop web page: http://hpcs2017.cisedu.info/conference/workshops---hpcs2017/workshop06-apmm HPCS web page: http://hpcs2017.cisedu.info ************************************************************************** * Call for Papers With Chip Multi-Processor (CMP) systems, performance increase on the microprocessor side will continue according to Moore's Law, at least in the near future. Accordingly, next-generation CMPs will be featured by a large amount of integrated cores, up to some thousands in the near future. However, the already existing performance limitations due to slow memory access and cache coherence overhead are expected to get worse with such highly parallel CMPs, and they will make it hard for users to fully exploit the theoretically available performance. This challenging problem gets further complicated by the hybrid and hierarchical design of compute clusters and high-end supercomputers, as well as the use of accelerator components (GPGPUs by AMD and NVIDIA, Intel Xeon Phi, Intel SCC, integrated GPUs etc.). Therefore, to lower the programming burden revolutionary high-level programming models to express parallel programs on next-generation CMPs are expected to become more prevalent in years to come. * Topics of interest include, but are not limited to, the following: - High-level parallel programming approaches - Parallel patterns for massively parallel CMPs - Run-time supports for hybrid platforms - Tools for performance and cache behavior analysis - Performance modeling and profiling tools - Software engineering, code optimization, and code generation strategies for parallel systems with multi-core processors - Parallelization on HPC platforms; eg., platforms with hierarchical communication layout, multi-/many-core platforms, NUMA architectures, or accelerator components (Intel Xeon Phi, NVIDIA and AMD GPU, Tilera, FPGA, integrated GPUs such as AMD APUs or Intel Haswell/Ivy Bridge) * Submission Instructions You are invited to submit original and unpublished research works on above and other topics related to Many-core computing, modeling and algorithms. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer to http://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-po… for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. Submit a PDF copy of your full manuscript to the workshop paper submission site at https://easychair.org/conferences/?conf=appmm2017. Acknowledgement will be sent within 48 hours of submission. Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop. * Important Dates April 1, 2017 Paper submission deadline April 20, 2017 Paper acceptance notifications May 3, 2017 Camera-ready due July 17-21, 2017 Workshop day * Workshop Co-Chairs - Gabriele Mencagli, University of Pisa, Italy - Massimo Torquati, University of Pisa, Italy Looking forward to receiving your excellent submissions soon. Best regards, Gabriele Mencagli and Massimo Torquati -- Gabriele Mencagli CFP.txt ************************************************************************** APPMM 2017: a HPCS 2017 International Workshop Advancements in Parallel Programming Models and Frameworks for the Multi-/Many-core Era Date: 17-21, July 2017 Location: Genova, Italy Submission link:https://easychair.org/conferences/?conf=appmm2017 Workshop web page:http://hpcs2017.cisedu.info/conference/workshops---hpcs2017/workshop06-apmm HPCS web page:http://hpcs2017.cisedu.info ************************************************************************** * Call for Papers With Chip Multi-Processor (CMP) systems, performance increase on the microprocessor side will continue according to Moore's Law, at least in the near future. Accordingly, next-generation CMPs will be featured by a large amount of integrated cores, up to some thousands in the near future. However, the already existing performance limitations due to slow memory access and cache coherence overhead are expected to get worse with such highly parallel CMPs, and they will make it hard for users to fully exploit the theoretically available performance. This challenging problem gets further complicated by the hybrid and hierarchical design of compute clusters and high-end supercomputers, as well as the use of accelerator components (GPGPUs by AMD and NVIDIA, Intel Xeon Phi, Intel SCC, integrated GPUs etc.). Therefore, to lower the programming burden revolutionary high-level programming models to express parallel programs on next-generation CMPs are expected to become more prevalent in years to come. * Topics of interest include, but are not limited to, the following: - High-level parallel programming approaches - Parallel patterns for massively parallel CMPs - Run-time supports for hybrid platforms - Tools for performance and cache behavior analysis - Performance modeling and profiling tools - Software engineering, code optimization, and code generation strategies for parallel systems with multi-core processors - Parallelization on HPC platforms; eg., platforms with hierarchical communication layout, multi-/many-core platforms, NUMA architectures, or accelerator components (Intel Xeon Phi, NVIDIA and AMD GPU, Tilera, FPGA, integrated GPUs such as AMD APUs or Intel Haswell/Ivy Bridge) * Submission Instructions You are invited to submit original and unpublished research works on above and other topics related to Many-core computing, modeling and algorithms. Submitted papers must not have been published or simultaneously submitted elsewhere. For Regular papers, please submit a PDF copy of your full manuscript, not to exceed 8 double-column formatted pages per template, and include up to 6 keywords and an abstract of no more than 400 words. Additional pages will be charged additional fee. Submission should include a cover page with authors' names, affiliation addresses, fax numbers, phone numbers, and all authors email addresses. Please, indicate clearly the corresponding author(s) although all authors are equally responsible for the manuscript. Short papers (up to 4 pages), poster papers and posters (please refer tohttp://hpcs2017.cisedu.info/1-call-for-papers-and-participation/call-for-posters for posters submission details) will also be considered. Please specify the type of submission you have. Please include page numbers on all preliminary submissions to make it easier for reviewers to provide helpful comments. Submit a PDF copy of your full manuscript to the workshop paper submission site athttps://easychair.org/conferences/?conf=appmm2017. Acknowledgement will be sent within 48 hours of submission. Only PDF files will be accepted, uploaded to the submission link above. Each paper will receive a minimum of three reviews. Papers will be selected based on their originality, relevance, significance, technical clarity and presentation, language, and references. Submission implies the willingness of at least one of the authors to register and present the paper, if accepted. At least one of the authors of each accepted paper will have to register and attend the HPCS 2017 conference to present the paper at the workshop. * Important Dates April 1, 2017 Paper submission deadline April 20, 2017 Paper acceptance notifications May 3, 2017 Camera-ready due July 17-21, 2017 Workshop day * Workshop Co-Chairs - Gabriele Mencagli, University of Pisa, Italy - Massimo Torquati, University of Pisa, Italy Looking forward to receiving your excellent submissions soon. Best regards, Gabriele Mencagli and Massimo Torquati -- Gabriele Mencagli

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2nd CFP: Tenth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2 2017)
by Seo, Sangmin 06 Mar '17

06 Mar '17

============================================================== P2S2 2017 - CALL FOR PAPERS ============================================================== The Tenth International Workshop on Parallel Programming Models and Systems Software for High-End Computing (P2S2) August 14th, 2017, Bristol, UK To be held in conjunction with ICPP 2017: The 46th International Conference on Parallel Processing. Website: http://www.mcs.anl.gov/events/workshops/p2s2/2017/ SCOPE ----- The goal of this workshop is to bring together researchers and practitioners in parallel programming models and systems software for high-end computing architectures. Please join us in a discussion of new ideas, experiences, and the latest trends in these areas at the workshop. TOPICS OF INTEREST ------------------ The focus areas for this workshop include, but are not limited to: * Systems software for high-end scientific and enterprise computing architectures - Communication sub-subsystems for high-end computing - High-performance file and storage systems - Fault-tolerance techniques and implementations - Efficient and high-performance virtualization and other management mechanisms for high-end computing * Programming models and their high-performance implementations - MPI, Sockets, OpenMP, Global Arrays, X10, UPC, CAF, Chapel, and others - Hybrid Programming Models * Tools for Management, Maintenance, Coordination and Synchronization - Software for Enterprise Data-centers using Modern Architectures - Job scheduling libraries - Management libraries for large-scale system - Toolkits for process and task coordination on modern platforms * Performance evaluation, analysis and modeling of emerging computing platforms PROCEEDINGS ----------- Proceedings of this workshop will be published in CD format only and will be available at the conference (together with the ICPP conference proceedings). The published papers will be available at the conference in CD format, and will be submitted to the IEEE CS Digital Library. SUBMISSION INSTRUCTIONS ----------------------- Submissions should be in PDF format in U.S. letter size paper, and should be formatted in a double-column format with a font size 10 pt or larger. They should not exceed 10 pages (all inclusive). Submissions will be judged based on relevance, significance, originality, correctness and clarity. The paper submission online system is open: https://easychair.org/conferences/?conf=p2s2-2017 JOURNAL SPECIAL ISSUE --------------------- The P2S2-2017 workshop papers will be invited to extend the manuscripts to be considered for a Special Issue on Parallel Programming Models and Systems Software of the Elsevier International Journal of Parallel Computing (PARCO), edited by Pavan Balaji, Abhinav Vishnu, and Yong Chen. This special issue is dedicated for the papers accepted in the P2S2 workshop. The submission to this special issue is by invitation only and the submission deadline is tentatively set as August 31st, 2017. IMPORTANT DATES --------------- Paper Submission: April 3rd, 2017, Anywhere on Earth Author Notification: May 17th, 2017 Camera-Ready Copy: May 26th, 2017 Workshop Dates: August 14th, 2017 PROGRAM CHAIRS -------------- * Pavan Balaji, Argonne National Laboratory * Abhinav Vishnu, Pacific Northwest National Laboratory * Yong Chen, Texas Tech University PUBLICITY CHAIR --------------- * Sangmin Seo, Argonne National Laboratory STEERING COMMITTEE ------------------ * William D. Gropp, University of Illinois, Urbana-Champaign * Vijay Saraswat, IBM Research PROGRAM COMMITTEE ----------------- * Ahmad Afsahi, Queen's University * Patrick Bridges, University of New Mexico * Suren Byna, Lawrence Berkeley National Laboratory * Daniel Chavarría, Pacific Northwest National Laboratory * Bronis de Supinski, Lawrence Livermore National Laboratory * Zhihui Du, Tsinghua University * Yanfei Guo, Argonne National Laboratory * Zhiyi Huang, University of Otago * Zhiling Lan, Illinois Institute of Technology * Jay Lofstead, Sandia National Laboratories * Xiaoyi Lu, The Ohio State University * Yin Lu, Texas Tech University * Chao Mei, Google * Scott Pakin, Los Alamos National Laboratory * Min Si, Argonne National Laboratory * Lucas Wilson, Texas Advanced Computing Center * Yonghong Yan, Oakland University * Yunquan Zhang, Chinese Academy of Sciences If you have any questions, please contact us at p2s2-chairs at mcs.anl.gov

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Call for Posters / Highlight Papers: ACM SYSTOR 2017
by Moshik Hershcovitch 06 Mar '17

06 Mar '17

[Apologies if you receive this multiple times ] SYSTOR 2017 May 22-24, 2017 Haifa, Israel Poster submission deadline: March 22, 2017 Highlights paper submission deadline: March 29, 2017 The conference will take place May 22-24, 2017 in Haifa, Israel. http://systor.org/2017 Formatting and submission instructions: http://www.systor.org/2017/cfp.html SYSTOR has a broad scope, promoting experimental and practical computer systems research encompassing the following topics: * Operating systems, computer architecture, and their interactions * Distributed, parallel, and cloud systems * Networked, mobile, wireless, peer-to-peer, and sensor systems * Runtime systems and compiler/programming-language support * File and storage systems * Security, privacy, and trust * Virtualization * Embedded and real-time systems * Fault tolerance, reliability, and availability * Deployment, usage, and experience * Performance evaluation and workload characterization SYSTOR is a home for high-quality international systems research of a practical nature and welcomes both academic and industrial contributions. Accepted posters will be published as an extended abstract in the proceedings in the ACM Digital Library, while authors will retain the copyright for these contributions. * Posters: Authors wishing to share an early work, not yet ready for submission to a refereed conference or journal, or to describe a technical (non-marketing) innovation are welcome to submit a poster. A poster submission should include an extended abstract following the formatting guidelines, and a draft poster (formatted for A4) in PDF. * Highlight papers: should contain exciting research results that have been accepted to a recent top-tier systems conference or journal. A small sub-committee will briefly review these submissions and will select the most suitable ones for SYSTOR. The corresponding presentations will then be "replayed" at SYSTOR for the benefit of the local community. A highlight paper submission should include the full citation of the published or accepted paper and a link to it. Accepted submissions will not be published in the proceedings. SYSTOR 2017 will host distinguished keynote speakers, a poster session, and several social events at the conference. Our goal is to provide an excellent forum for interaction across the systems community: international, academic, and industrial, for both students and more established members. KEYNOTE SPEAKERS: * Emery Berger (University of Massachusetts Amherst) * Orran Krieger (Boston University) * Timothy Roscoe (ETH Zürich) PROGRAM COMMITTEE CHAIRS * Peter Desnoyers (Northeastern University) * Eyal de Lara (University of Toronto) GENERAL CHAIR * Doron Chen (IBM Research) PUBLICATION CHAIR * Aviad Zuck (Technion) POSTERS CHAIR * Adam Morrison (Tel-Aviv University) PUBLICITY CHAIR: * Moshik Hershcovitch (IBM Research) STEERING COMMITTEE HEAD * Michael Factor (IBM Research) STEERING COMMITTEE * Ethan Miller (University of California Santa Cruz) * Liuba Shrira (Brandeis University) * Dan Tsafrir (Technion) * Dalit Naor (IBM Research) * Erez Zadok (Stony Brook University)

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CFP DS-RT 2017, Rome, Italy
by Robson De Grande 06 Mar '17

06 Mar '17

---------------------------------------------------------------------------- Please accept our apologies if you have received multiple copies. ---------------------------------------------------------------------------- Call for Papers - DS-RT 2017 21st IEEE/ACM* International Symposium on Distributed Simulation and Real Time Applications http://ds-rt.com/2017 18 - 20 October 2017, Rome, Italy *IEEE/ACM Pending Upon Approval ---------------------------------------------------------------------------- Important: Paper submission deadline: 12th May 2017 ---------------------------------------------------------------------------- *** The Symposium *** The 2017 IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications (DS-RT 2017) promises to be a grand affair and will take place in Rome, Italy. DS-RT 2017 serves as a platform for simulationists from academia, industry and research labs for presenting recent research results in Distributed Simulation and Real Time Applications. DS-RT 2017 targets the growing overlap between large distributed simulations and real time applications, such as collaborative virtual environments, pervasive and ubiquitous application scenarios, motor-, controller-, sensor- and actuator systems. The conference features prominent invited speakers as well as papers by top researchers in the field. DS-RT 2017 will include contributed technical papers, invited papers, and panel discussions. The proceedings will be published by IEEE-CS press. *** Call for Papers *** DS-RT provides an international forum for the discussion and presentation of original ideas, recent results and achievements by researchers, research students, and systems developers on issues and challenges related to distributed simulation and real time applications. Authors are encouraged to submit both theoretical and practical results of significance. Demonstration of new tools/applications is very encouraged. The scope of the symposium includes, but is not limited to: - Paradigms, Methodology and Software Architectures for Large Scale Distributed and Real-Time Simulations (e.g. Parallel and Distributed Simulation, Multi-Agent Based Distributed Simulation, HLA/RTI, Web, Grid and cloud based Simulation, hardware-software co-design for extreme scale simulations) - Paradigms, Modelling, Architecture and Environments for Large Scale Real-time Systems and Concurrent Systems with hard and soft Real-Time Contstraints - Advanced modelling techniques (reuse of models, new modelling languages, agent-based M&S, and spatial M&S) - Non-functional Properties of Distributed Simulation and Real-Time Systems (e.g. Dependability, Availability, Reliability, Maintainability, Safety, Security, Trustworthiness, QoS) - Theoretical Foundations of Large Scale Real-Time and Simulation Models (e.g. Event Systems, Causality, Space-Time Models, Notions of Time, Discrete and Continuous Systems, Simulator Coordination) - Simulation Studies at Large and Very Large Scale (e.g. Industrial, Commercial, Ecological and Environmental, Societal, Power and Energy, Pervasive and Ubiquitous Computing Systems) - Performance and Validation of Large Scale and Distributed Simulations (e.g., benchmarking and analytical results, empirical studies DIS, HLA/RTI studies) - Algorithms and methods for parallel or distributed simulation (synchronization, scheduling, memory management, and load balancing) - Languages and Tools, Development Environments, Data Interfaces, Network Protocols and Model Repositories that address Very Large Simulations - Data Management and Distribution Issues, Interest Management, Semantic Modelling, Multi-resolution Modelling, Dead-Reckoning Mechanisms - Pervasive and Ubiquitous Computing Architectures and Applications that involve Simulations and/or adhere to Real-Time Constraints - Simulation based Virtual Environments and Mixed Reality Systems (e.g. Interactive Virtual Reality, Human Communication through Immersive Environments) - Collaborative Virtual and Augmented Reality, Shared Interaction Spaces, Telepresence Systems and Shared Workspaces, 3D Video and Acoustic Reconstruction, Shared Object Manipulation - Serious Gaming and Massive Multiplayer Online Games (MMOG) applications, architectures and scalability issues - Visual Interactive Simulation Environments (e.g., Generic Animation, Visual Interactive Modelling, Interactive Computer Based Training and Learning, Scientific Visualization, High-End Computer Graphics) - Design Issues, Interaction Designs, Human Commuter Interaction Issues raised by Large Scale DS-RT Systems - Media Convergence (e.g. New Technologies, Media Theory, Real-Time considerations of Multi Modality, etc.) - Innovative Styles of Interactions with Large Scale DS-RT Systems (e.g. Implicit, Situative and Attentive Interaction, Tangible Interaction, Embedded Interaction, etc.) - Technologies for Living Labs (e.g. Mirror World Simulation, Interoperability, Large Scale Multi Sensor Networks, Global Wireless Communication, Multi Stakeholder Understanding and Innovation) - Environmental and Emerging Simulation Challenges (e.g. Growth of Human Population, Climate Change, CO2, Health Care, Ecosystems, Sustainable Development, Water and Energy Supply, Human Mobility, Air Traffic, World Stock Markets, Food Supply Chains, Megacities, Smart Cities, Disaster Planning, etc.) - Advanced Simulation Studies and Technologies (e.g. Discrete event, continuous Simulation, etc.) - Cognitive Modelling and Simulation, Artificial Intelligence in Simulation, and Neural Network Models and Simulation - Service-oriented Computing and Simulation, Web-based Modelling and Simulation, and Simulation of Multimedia Applications and Systems - Modeling and Virtual Evaluation of Distributed Systems through Simulation, Resilience Network Evaluation in Distributed Systems through Simulation, Models and Simulation Environments for Distributed Cyber-Physical Systems Evaluation - Advances in Simulation Methodology and Practices - Smart Network Design and Traffic Modelling - Haptic-audio-visual System and applications - Medical and surgical simulation based Systems - Human-computer interaction in virual reality environment Authors of selected papers will be invited to submit extended versions of their papers to the Journal of Simulation (JoS). *** Important Dates Full Papers *** Paper Submission Deadline: 5th May 2017 Notification of Acceptance: 5th June 2017 Camera Ready version due: 10th July 2017 Symposium presentation: 18 - 20 October 2017 *** Call for Posters/Demos/Industrial Case Studies *** The 21st IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications (DS-RT 2017) also solicits posters and technical demonstrations that report on recent original results, ongoing research or industrial case studies in the area of distributed simulation and real time applications. *** Important Dates Posters/Demos/Industrial Case Studies *** Paper submission deadline: 12th May 2017 Notification of acceptance: 5th June 2017 Camera-ready deadline: 10th July 2017 *** Submission *** Papers must be unpublished and must not be submitted for publication elsewhere. All papers will be reviewed by Technical Program Committee members and other experts active in the field to ensure high quality and relevance to the conference. Accepted papers will appear in the conference proceedings to be published by IEEE-CS press. General information regarding submission can be found at http://ds-rt.com/2017 Questions from authors may be directed to the Program Co-Chairs. IMPORTANT: ATTENDANCE BY AT LEAST ONE AUTHOR IS MANDATORY *** ORGANIZING COMMITTEE*** General Chair: Alfredo Garro, University of Calabria, Rende, Italy Program Chair: Andrea D'Ambrogio, University of Rome "Tor Vergata", Rome, Italy Special Session Co-Chairs: Anthony Ventresque,Lero & University College Dublin, Dublin, Ireland Robson De Grande, University of Ottawa, Ottawa, Canada Local Organization Chair: Andrea Giglio, Guglielmo Marconi University, Rome, Italy Financial Chair: Rina Mary Mazza, University of Calabria, Rende, Italy Registration Chair: Simona Citrigno, ICT-SUD Competence Center, Rende, Italy Publicity Co-Chairs: Simon J.E Taylor, Brunel University London, UK Mirela Sechi Moretti Annoni Notare, FAERO - University of Technology in Fly Transportation, Florianopolis, Brazil Posters Chair: Floriano De Rango, University of Calabria, Rende, Italy Publication Chair: Andrea Tundis, Technische Universitdt Darmstadt, Darmstadt, Germany Web Co-Chairs: Robson De Grande, University of Ottawa, Ottawa, Canada Rodolfo Coutinho, UFMG, Belo Horizonte, Brazil

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IEEE NAS 2017 Call for Papers (Due April 10 2017) & Posters (Due June 19 2017)
by Kang Chen 05 Mar '17

05 Mar '17

CALL FOR PAPERS & POSTERs—Apologize for receiving multiple copies Please disseminate this CFP to your colleagues & contacts 12th IEEE International Conference on Networking, Architecture and Storage (NAS 2017) Shenzhen, China, August 7-9, 2017, http://www.nas-conference.org/ Keynote Speakers: · Internet of Vehicles: From Intelligent Grid to Autonomous Cars, Mario Gerla<http://web.cs.ucla.edu/%7Egerla/>, John Postel Chair Professor, University of California, Los Angeles, IEEE Fellow · Paving the Way towards NFV: An Infrastructure based Approach<http://www.nas-conference.org/NAS-2017/keynote_taoli.html>, Tao Li, Professor, University of Florida, NSF Program Director in the CCF division within the CISE directorate Important Dates: Paper Submission: April 10, 2017 Notification: May 29, 2017 Camera Ready submission: June 26, 2017 Conference Information: The International Conference on Networking, Architecture, and Storage provides a high-quality international forum to bring together researchers and practitioners from academia and industry to discuss cutting-edge research on networking, high-performance computer architecture, and parallel and distributed data storage technologies. NAS 2017 will expose participants to the most recent developments in the interdisciplinary areas. Authors are invited to submit previously unpublished work for possible presentation at the conference. The program committee will nominate best papers for recognition in each of the three conference topic areas. All papers will be evaluated based on their novelty, fundamental insight, experimental evaluation, and potential for long-term impact; new-idea papers are encouraged. All accepted papers will be published in IEEE digital library. Papers are solicited in fields that include, but are not limited to, the following: • Accelerator-based architectures • Mobile and wireless networks • Ad hoc and sensor networks • Network applications and services • Application-specific, reconfigurable • Network architecture and protocols or embedded architectures • Network information theory • Architecture for handheld or mobile • Network modeling and measurement devices • Network security • Architecture, networking or storage • Non-volatile memory technologies modeling and simulation • Parallel and multi-core architectures methodologies • Parallel I/O • Big Data infrastructure • Power and energy efficient • Big Data services and analytics architectures and techniques • Cloud and grid computing • Processor, cache, memory system • Cloud storage architectures • Data-center scale architectures • Software defined networking • Effects of circuits and emerging • Software defined storage technology on architecture • SSD architecture and applications • Energy-aware storage • Storage management • File systems, object-based storage • Storage performance and scalability • GPU architecture and programming • Storage virtualization and security • HW/SW co-design and tradeoffs • Virtual and overlay networks Paper Submission: Please refer to the following link for paper submission detail: http://www.nas-conference.org/NAS-2017/submission.html Call For Poster: NAS’17 will include a poster session for authors wishing to share their late-breaking research as well as work in an early stage of development that is suitable for presentation in the form of a poster. Topics of interest to NAS can be found on its website (http://www.nas- conference.org<http://www.nas-conference.org/>). We invite all potential authors to submit their contributions in the form of a two-page PDF file formatted with templates for regular IEEE conference papers (IEEE Conference templates<http://www.ieee.org/conferences_events/conferences/publishing/templates.html>). A submission should include poster title, author information, and a short abstract. Inclusion of preliminary evaluation results is preferred. Posters will be selected for acceptance based on their novelty, relevance, and quality of presentation. Accepted posters will be published online at the conference website and included in the conference proceedings as extended abstracts, while authors will retain the copyright for these contributions. Authors of accepted posters are expected to prepare and present their posters. Format of posters for display will be available after notification of acceptance. Important Dates: Extended Abstracts due: June 19, 2017 Author Notification: June 26, 2017 Camera Ready Abstracts: July 7, 2017 To submit, please use NAS’17’s submission website at EasyChair (https://easychair.org/conferences/?conf=ieeenas2017)<https://easychair.org/conferences/?conf=ieeenas2017>. No reviews will be provided. For any questions about the submission, selection, and presentation of the accepted posters, please contact NAS program chairs, Haiying Shen or Christian Engelmann (Email: hs6ms(a)virginia.edu <mailto:[email protected]> or engelmannc(a)ornl.gov<mailto:[email protected]>)<mailto:[email protected]>.

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HEART-2017 Call for papers --Final Deadline Extension--
by Kenji KANAZAWA 05 Mar '17

05 Mar '17

======================================================================== HEART-2017 DEADLINE HAS BEEN EXTENDED TO MARCH 19 (Firm deadline). ======================================================================== /****************************************************************/ Call for Papers Abstract Submission Deadline: March 15th, 2017 Full Paper Submission Deadline: March 19th, 2017 (Firm Deadline) Call for Design Competitions Design Competition Paper submission: March 31, 2017 The 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART2017) 7-9 June 2017, Bochum, Germany <http://heart2017.esit.rub.de/> http://heart2017.esit.rub.de/ /****************************************************************/ Important dates: - Submission deadline for abstracts of conference papers: March 15, 2017 - Submission deadline for full conference papers: March 19, 2017 (Firm deadline) - Submission deadline for design competition papers: March 31, 2017 - Acceptance notification: April 15, 2017 - Camera-ready/Author registration: April 30, 2017 - Symposium dates: June 7-9, 2017 /****************************************************************/ Highlights: - Xilinx Pynq Workshop will be organized on June 6, 2017 - Social Event: Starlight Express Musical /****************************************************************/ The 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART) is a forum to present and discuss new research on accelerators and the use of reconfigurable technologies for high-performance and/or power-efficient computation. Submissions are solicited on a wide variety of topics related to the acceleration for high-performance computation, including but not limited to: - Architectures and systems: --- Novel systems/platforms for efficient acceleration based on FPGA, GPU, and other devices --- Heterogeneous processor architectures and systems for scalable, high-performance, high-reliability, and/or low-power computation --- Reconfigurable and configurable hardware and systems including IP-cores, embedded systems, SoCs, and cluster/grid/cloud computing systems for scalable, high-performance and/or low-power processing --- Custom computing system for domain-specific applications such as Big-data, multimedia, bioinformatics, cryptography, and more --- Novel architectures and device technologies that can be applied to efficient acceleration, including many-core/NoC architectures, 3D-stacking technologies and optical devices - Software and applications: --- Novel applications of high-performance computing and Big-data processing with efficientacceleration and custom computing --- System software, compilers and programming languages for efficient accelerationsystems / platforms, including many-core processors, GPUs, FPGAs and otherreconfigurable /custom processors --- Run-time techniques for acceleration, including Just-in-Time compilation and dynamicpartial-reconfiguration --- Performance evaluation and analysis for efficient acceleration --- High-level synthesis and design methodologies for heterogeneous, reconfigurable and/orcustom processors/systems In order to encourage open discussion on future directions, the program committee will provide higher priority for papers that present highly innovative and challenging ideas. We are planning to organize special sessions on HPC, Big data, and Dynamic Reconfiguration. When submitting a paper, please select topic(s) if the paper is related to them. Note that regardless of the selection of special session topic(s), your paper will undergo the same peer-review process as the main technical track. Prospective authors are invited to submit original and unpublished contributions as 6-page papers to be considered as regular papers or 4-page papers to be considered as poster papers. All contributions must be submitted electronically in PDF format (two columns, US letter size, single-spacing, 10 points for main body text). For double-blind review, manuscripts must NOT identify the authors in any way, so author names, affiliations, e-mail addresses and self-references should be blanked out. Papers that identify authors may be rejected without review. You can submit your contribution(s) by following this easychair submission link. Submission: <https://www.easychair.org/conferences/?conf=heart2017> https://www.easychair.org/conferences/?conf=heart2017 Each accepted paper MUST have at least one author with a regular registration for the manuscript to be included and published in the symposium proceedings and ACM post-proceedings (tentative). Authors are also expected to attend and present their paper(s) at the symposium. The HEART2017 paper template can be download here: HEART2017 template in MS-Word, HEART2017 template in Latex. MS-Word: <http://www.isheart.org/HEART2017/heart2017.doc> http://www.isheart.org/HEART2017/heart2017.doc Latex: <http://www.isheart.org/HEART2017/heart2017.cls> http://www.isheart.org/HEART2017/heart2017.cls ------------------------------------------------------------------------ Organizing Committee: General co-chairs: Diana Goehringer, Ruhr-University Bochum, DE Michael Huebner, Ruhr-University Bochum, DE Technical program co-chairs: Holger Blume, Leibniz University Hannover, DE Martin Herbordt, Boston University, US Hiroki Nakahara, Tokyo Tech, JP Publicity co-chairs: Kenji Kanazawa, University of Tsukuba, JP Gabriel Marchesan, Harman International, DE Brain Veale, IBM, US Finance and local arrangement chair: Linda Trogant, Ruhr-University Bochum, DE Publication chair: Yuichiro Shibata, Nagasaki University, JP Design contest chair: Donald Bailey, Donald Bailey, NZ

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ARCS 2017: CALL FOR PARTICIPATION
by Miquel Pericàs 04 Mar '17

04 Mar '17

CALL FOR PARTICIPATION ARCS 2017 - International Conference on Architecture of Computing Systems April 03 - 06, 2017, Vienna, Austria http://arcs2017.itec.kit.edu/ You are cordially invited to participate in ARCS 2017, which has a tradition of over 30 years The ARCS conferences series has over 30 years of tradition reporting leading edge research in computer architecture and operating systems. The focus of the 2017 conference will be on Heterogeneous Node Architectures with Deep Memory Systems. Early registration closes on March 13, 2017. Register online now at http://arcs2017.itec.kit.edu/?p=7 Check the preliminary program at http://arcs2017.itec.kit.edu/?p=4 Including * Three keynote presentations: Stephan Ulamec, DLR, Germany: "Exploring New Worlds: The Rosetta/Philae Mission and its Challenges to Computer Architecture" Chris Goodyear, ARM, Great Britain: "ARM HPC : Supercomputing on a Lower Power Budget" Barbara Chapman, SUNY Stonybrook, USA, "Parallel Heterogeneous Node Programming: A Work in Progress" * 19 technical papers on topics such as resilience, accelerators, system and application performance, memory systems, parallelism and many-core systems, scheduling, and power and energy * Four workshops organized together with the main conference (http://arcs2017.itec.kit.edu/?p=6) CompSpace: 1st Workshop on Computer Architectures in Space SAOS: 5th International Workshop on Self-Optimisation in Autonomic and Organic Computing Systems VERFE: 13th Workshop on Dependability and Fault Tolerance FORMUS3IC: 2nd FORMUS3IC - Workshop Important Dates Conference early registration deadline: March 13, 2017 Workshop early registration deadline: March 13, 2017 Conference: April 3 – 6, 2017 Organization General Co-Chairs: Jens Knoop, Vienna University of Technology, Austria Wolfgang Karl, Karslruhe Institute of Technology (KIT), Germany Program Co-Chairs: Martin Schulz, Lawrence Livermore National Lab, USA Inoue Koji, Kyushu University, Japan Workshop Chair Carsten Trinitis, Technische Universität München, Germany Publication Chair Thilo Pionteck, Magdeburg University, Germany Publicity Chair Miquel Pericàs, Chalmers University of Technology, Sweden Contact by email: wolfgang.karl(a)kit.edu

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CFP: HPC Monitoring and Analysis (HPCMASPA with IEEE Cluster)
by Gentile, Ann 04 Mar '17

04 Mar '17

Workshop on Monitoring and Analysis for High Performance Computing Systems Plus Applications https://sites.google.com/site/hpcmaspa2017 with IEEE Cluster, Honolulu HI, Sept 5 2017 Modern processors and operating systems being used in HPC systems expose a wealth of information about how system resources, including energy, are being utilized. Lightweight tools that gather and analyze this information could provide feedback, including run-time, to increase application performance; optimize system resource utilization; and drive more efficient future HPC system design. HPCMASPA 2017 seeks submissions on new ideas, research, techniques, and tools in the area of HPC monitoring, analysis, and feedback as it relates to increasing efficiency with respect to energy, resource utilization, and application run-time. SUBMISSIONS: - Full (8 page) and Short (4 page) Technical Papers. ABSTRACT: May 21. PAPER: May 28 - Work in Progress Papers (4 page). PAPER: Jul 9 TOPICS: 2017 Special Topic: monitoring and measurement in experiments In addition to: - Data collection, transport, and storage - Analysis of large-scale data and system information - Response to and utilization of processed data and system information - Experience reports and systems operations Full Details at https://sites.google.com/site/hpcmaspa2017

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