April 2016 - hpc-announce - mailman3.cels.anl.gov

ASBD2016 call for Paper
by 姚治成 12 Apr '16

12 Apr '16

The deadline of ASBD2016 paper submission has been delayed. http://acs.ict.ac.cn/asbd2016/ Sixth Workshop on Architectures and Systems for Big Data(ASBD 2016) Held in conjunction with The 43st International Symposium on Computer Architecture (ISCA 2016) June 18, 2016 Seoul, Korea Submissions deadline: April 22, 2016 Author notification: May 06, 2016 ISCA 2016 logo ISCA-2016 Call for papers The term "Big Data" refers to the continuing massive expansion in the data volume and diversity as well as the speed and complexity of data processing. The use of big data underpins critical activities in all sectors of our society. Achieving the full transformative potential of big data in this increasingly digital world requires both new data analysis algorithms and a new class of systems to handle the dramatic data growth, the demand to integrate structured and unstructured data analytics, and the increasing computing needs of massive-scale analytics. We are pleased to request papers for presentation at the upcoming Fifth Workshop on Architectures and Systems for Big Data (ASBD 2016) held in conjunction with ISCA-43. The workshop will provide a forum to exchange research ideas related to all critical aspects of emerging analytics systems for big data, including architectural support, benchmarks and metrics, data management software, operating systems, and emerging challenges and opportunities. We hope to attract a group of interdisciplinary researchers from academia, industry and government research labs. To encourage discussion between participants, the workshop will include significant time for interactions between the presenters and the audience. We also plan to have a keynote speaker and/or panel session. Topics of interest include but are not limited to: Processor, memory and system architectures for data analytics Benchmarks, metrics and workload characterization for big data Accelerators for analytics and data-intensive computing Implications of data analytics to mobile and embedded systems Energy efficiency and energy-efficient designs for analytics Availability, fault tolerance and data recovery in big data environments Scalable system and network designs for high concurrency/bandwidth streaming Data management and analytics for vast amounts of unstructured data Evaluation tools, methodologies and workload synthesis OS, distributed systems and system management support for large-scale analytics Debugging and performance analysis tools for analytics and big data Programming systems and language support for deep analytics MapReduce and other processing paradigms for analytics We encourage researchers from all institutions to submit their work for review. Preliminary results of interesting ideas and work-in-progress are welcome. Submissions that are likely to generate vigorous discussion will be favored! Submission format: All papers should be submitted in PDF format, using 10 point or larger font for text (8 points or larger for figures and tables), total length not to exceed 6 pages. Paper Submission : https://easychair.org/conferences/?conf=asbd2016 Committees Workshop Co-Organizers: Lixin Zhang, ICT/CAS China Yungang Bao, ICT/CAS China Program Co-Chairs: John Kim, KAIST South Korea Xiufeng Sui, ICT/CAS China Program Committee: Zhibin Yu, SIAT/CAS China Haibo Chen, Shanghai Jiao Tong University Jing Wang, Capital Normal University XinFu, University of Houston Sally A. McKee, Chalmers University of Technology Steering Committee: Jian Li, Huawei Jichuan Chang, Google Evan Speight, IBM Research Important Dates Submissions deadline: April 22, 11:59:59PM PST, 2016 Author notification: May 06, 2016

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Call For Papers: IEEE BigDataSE-16 (Deadline Extended to April 30, 2016)
by Xiaobo Zhou 12 Apr '16

12 Apr '16

/* Please accept our apologize if you receive multiple copies of this CFP */ =================================================== Submission deadline extended to April 30, 2016. One best paper will be awarded, and distinguished papers selected from the conference will be published directly in special issues of several prestigious journals, including IEEE Transactions on Big Data. =================================================== =================================================== CALL FOR PAPERS The 10th IEEE International Conference on Big Data Science and Engineering (IEEE BigDataSE-16) http://adnet.tju.edu.cn/BigDataSE2016/ 23-26 August 2016, Tianjin, China =================================================== IMPORTANT DATES Submission Deadline: April 30, 2016 (extended) Authors Notification: May 31, 2016 Final Manuscript Due: July 1, 2016 SCOPE Big data is an emerging paradigm applied to datasets whose size is beyond the ability of commonly used software tools to capture, manage, and process the data within a tolerable elapsed time. Such datasets are often from various sources (Variety) yet unstructured such as social media, sensors, scientific applications, surveillance, video and image archives, Internet texts and documents, Internet search indexing, medical records, business transactions and web logs; and are of large size (Volume) with fast data in/out (Velocity). More importantly, big data has to be of high value (Value) and establish trust in it for business decision making (Veracity). Various technologies are being discussed to support the handling of big data such as massively parallel processing databases, scalable storage systems, cloud computing platforms, and MapReduce. Big data is more than simply a matter of size; it is an opportunity to find insights in new and emerging types of data and content, to make business more agile, and to answer questions that were previously considered beyond our reach. Distributed systems is a classical research discipline investigating various distributed computing technologies and applications such as cloud computing and MapReduce. With new paradigms and technologies, distributed systems research keeps going with new innovative outcomes from both industry and academia. For example, wide deployment of MapReduce is a distributed programming paradigm and an associated implementation to support distributed computing over large datasets on cloud. BigDataSE is created to provide a prime international forum for researchers, industry practitioners and environment experts to exchange the latest fundamental advances in the state of the art and practice of Big Data and broadly related areas. BigDataSE 2016 is the next event in a series of highly successful International Conferences, previously held as BigDataSE2015 (Helsinki, Finland, August 2015), BigDataSE2014 (Beijing, China, September 2014), BigDataSE2013 (Sydney, Australia, December 2013), BigDataMR-12 (Xiangtan, China, November 2012), AHPCN-12 (Bradford, UK, June 2012), AHPCN-11 (Banff, Canada, September 2011), AHPCN-10 (Melbourne, Australia, September 2010), AHPCN-09 (Seoul, Korea, June 2009), AHPCN-08 (Dalian, China, September 2008). TOPICS Topics of interest include, but not limited to - Big Data novel theory, algorithm and applications - Big Data standards - Big Data mining and analytics - Big Data Infrastructure, MapReduce and Cloud Computing - Big Data visualization - Big Data curation and management - Big Data semantics, scientific discovery and intelligence - Big Data performance analysis and large-scale deployment - Security, privacy, trust, and legal issues to big data - Big Data vs Big Business and Big Industry - Large data stream processing on cloud - Large incremental datasets on cloud - Distributed and federated datasets - NoSQL data stores and DB scalability - Big Data placement, scheduling, and optimization - Distributed file systems for Big Data - MapReduce for Big Data processing, resource scheduling and SLA - Performance characterization, evaluation and optimization - Simulation and debugging systems and tools for MapReduce and Big Data - Volume, Velocity, Variety, Value and Veracity of Big Data - Multiple source data processing and integration with MapReduce - Storage and computation management of Big Data - Large-scale big data workflow management - Mobility and big data - Sensor network, social network and big data - Big data applications SUBMISSION GUIDELINES Submitted papers must not substantially overlap with papers that have been published or that are simultaneously submitted to a journal or a conference with proceedings. Papers must be clearly presented in English, must not exceed 8 pages, including tables, figures, references and appendixes, in IEEE Computer Society proceedings format with Portable Document Format (.pdf). Please submit your paper http://adnet.tju.edu.cn/BigDataSE2016/paper_submission.html Papers will be selected based on their originality, timeliness, significance, relevance, and clarity of presentation. Submission of a paper should be regarded as a commitment that, should the paper be accepted, at least one of the authors will register and attend the conference to present the work. Accepted and presented papers will be included in the IEEE CPS Proceedings. Distinguished papers presented at the conference, after further revision, will be recommended to high quality international journals. ORGANIZATION COMMITTEE General Chairs Geoffrey Fox, Indiana University, USA Minyi Guo, Shanghai Jiao Tong University, China Raghu Ganti, IBM T. J. Watson Research Center, USA Program Chairs Xueqi Cheng, Institute of Computing Technology, Chinese Academy of Sciences, China Yi Pan, Georgia State University, USA Carson Leung, University of Manitoba, Canada Program Vice Chair Shuai Ma, Beihang University, China Steering Co-Chairs Jinjun Chen, University of Technology Sydney, Australia (Chair) Laurence T. Yang, St Francis Xavier University, Canada (Chair) Workshop Chairs Zhen Liu, Nagasaki Institute of Applied Science, Japan Junqing Yu, Huazhong Unievrsity of Science and Technology, China Publicity Chairs Xialong Jin, Chinese Academy of Sciences, China Zhe Xia, Wuhan University of Technology, China Steering and Program Committees Please see http://adnet.tju.edu.cn/BigDataSE2016/

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Special Issue on Workflows for Data-Driven Research in FGCS - Deadline 30 April 2016
by Sandra Gesing 12 Apr '16

12 Apr '16

*************************************************************** * Special Issue on Workflows for Data-Driven Research * Journal Future Generation Computer Systems * http://www.journals.elsevier.com/future-generation-computer-systems/call-fo… **************************************************************** Data-intensive Workflows (a.k.a. scientific workflows) are routinely used in the majority of data-driven research disciplines today, often exploiting rich and diverse data resources and parallel and distributed computing platforms. This special issue focuses on the many facets of data-intensive and data-dependent workflows, from their use as a notation for describing, refining and sharing data-driven methods to the underpinning management systems that enact those methods. As such, it will welcome insights and clarity about any relevant topics including notations, strategies and tools for creating high quality data-intensive methods, and all aspects of mapping such methods onto platforms and organizing their execution, during their development and during their production use. The special issue therefore covers a broad range of topics in the scientific workflow lifecycle that include: the representation of data-intensive workflows and their enactment; workflow design and composition interfaces; workflow mapping techniques that may optimize the execution of the workflow; workflow enactment engines that need to deal with failures in the application and execution environment; and a number of computer science problems related to scientific workflows such as semantic technologies, compiler methods, fault detection and tolerance. The special issue welcomes research as well as position papers. Areas include, but are not limited to: - Workflow applications and their requirements - Abstract models and notations for data-intensive workflows - Methods for designing, refining and quality assuring workflows - Workflow composition, tools and languages - Workflow interoperability - Workflow debugging methods and tools - Workflow provenance collection, representation and use - Interactive workflows engaging domain specialists’ judgment - Workflow user environments, including portals - Methods and tools for mapping workflows to target platforms - Diverse platforms: e.g. HPC, HTC, Cloud and specialized data-intensive clusters, and smart devices - Exascale computing with workflows - Data streaming systems - Data-driven workflow processing - Workflow execution in distributed environments - Adaptive workflows - Dynamic data-dependent workflow systems - Big Data analytics workflows - Workflow fault-tolerance and recovery techniques - Workflow monitoring - Workflow optimizations - Performance analysis of workflows - Workflows for live data streams or dynamic networks e.g. sensor nets, Internet of Things (IoT) or mobile devices - Current and future challenges for data-driven workflow research *Submission Guidelines* Original, high quality contributions that are not yet published or that are not currently under review by other journals or peer-reviewed conferences are sought. Exceptions that may be accepted are invited high-quality papers from the last 10 years of the workshop WORKS and which are very significantly updated and extended. These must have at least 40% difference from the original conference papers. Papers will be peer reviewed by independent reviewers and selected based on originality, scientific quality and relevance to this Special Issue. The journal editors will make final decisions on the acceptance of the papers. Authors should prepare their manuscript according to the Guide for Authors available from the online submission page of the Future Generation Computer Systems at http://ees.elsevier.com/fgcs. Authors should select “SI: WORKS” when they reach the “Article Type” step in the submission process. *Important Dates* Paper submission due: 30 April, 2016 First-round acceptance notification: 30 June 2016 Revision submission: 15 September 2016 Notification of final decision: 15 January 2017 Submission of final paper: 28 February 2017 Expected publication: May 2017 *Guest Editors* Ian Taylor, University of Cardiff, UK and University of Notre Dame, USA Johan Montagnat, CNRS, France Malcolm Atkinson, University of Edinburgh, UK Sandra Gesing, University of Notre Dame, USA ------------------------------------------------------------------------------------------------------------ Sandra Gesing Research Assistant Professor, Department of Computer Science and Engineering Computational Scientist, Center for Research Computing University of Notre Dame http://www3.nd.edu/~sgesing ------------------------------------------------------------------------------------------------------------

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NVMSA 2016 CFP (deadline extended --> 25th of April)
by Jalil Boukhobza 11 Apr '16

11 Apr '16

(Apologies if you receive multiple copies of this message) ---------------------------------------------------------------------------- ---------------------- Call for Papers The 4th IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA) Daegu, Korea August 17-19, 2016 <https://sites.google.com/a/camelab.org/nvmsa-2016/> https://sites.google.com/a/camelab.org/nvmsa-2016/ Non-Volatile memory (NVM) technologies have demonstrated great potentials on improving many aspects of present and future memory hierarchy, offering high integration density, larger capacity, zero standby power and good resilience to soft errors. The recent research progress of various NVMs, e.g., NAND flash, PCM, STT-RAM, RRAM, FeRAM, etc., have drawn tremendous attentions from both academy and industry. Besides developing robust and scalable devices, the unique characteristics of these NVM technologies, such as read-write asymmetry, stochastic programming behavior, performance-power-nonvolatility tradeoff etc., introduce plenty of opportunities and challenges for novel circuit designs, architectures, system organizations, and management strategies. There is an urgent need of technology invention, modeling, analysis, design and application of these NVMs ranging from circuit design level to system level. IEEE Non-Volatile Memory Systems and Applications Symposium (NVMSA) provides a fantastic opportunity for global nonvolatile memory researchers from different communities to discuss and exchange knowledge, ideas, and insights, and to facilitate the establishment of potential collaborations that can speed up the progress in the design and application of NVMs. An expanded technical program will be offered in NVMSA 2016 for the audience from academy and industry. The organizing committee is soliciting various topics on related to NVMs including (but not limited to): Device/Circuit design of NVMs * Emerging Non-volatile Memory Circuit Design * NVM Device Design * Error correction for NVMs * Nonvolatile Logic Circuit Design NVM Architectures and Systems * Non-volatile Registers * Non-volatile Memory Architectures * Non-volatile Cache Design * NVM-based Neuromorphic Architectures * NVM-based Storage NVM Software * Operating System Support for NVM * Compiler Optimization for NVM * NVM-based File Systems * NVM-based Storage Software * NVM-based Databases * NVM Controller Design NVM Applications * In-memory Computing * NVM for Big Data Analytics * NVM in Mobile Healthcare Applications * NVM in Wearable Applications * NVM and the Internet of Things The topics of NVMSA cover the research and development advances in both mainstream and emerging NVMs. The event is designed to foster interaction and presentation of early results, new ideas and speculative directions. Thus, NVMSA will combine the presentations of the papers accepted from the regular submissions as well as a number of invited talks from researchers in academia, technologists from industry, and case studies on the use of NVMs. Participating authors are invited to submit six-page manuscripts to the conference and all accepted papers will be published in the conference proceeding. Conference content will be submitted for inclusion into IEEE Xplore as well as other Abstracting and Indexing (A&I) databases. The extensions of some selected papers will be published in a special issue of The Journal of Systems Architecture: Embedded Software Design. Important Dates April 25: Paper Submission Deadline June 1: Acceptance notification June 12: Camera ready Associated Conference: The 22nd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2016) -- Jalil Boukhobza Associate Professor Lab-STICC Lab./ Dept. of Computer Science University of Western Brittany, 20 Av. Le Gorgeu - CS 93837 29238 Brest Cedex 3 Tel: +33 2 98 01 69 73 Fax: +33 2 98 01 80 11

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HotI 2016 CFP
by Dinan, James 11 Apr '16

11 Apr '16

======================================================================= CALL FOR PAPERS ======================================================================= 24th International Symposium on High Performance Interconnects HotI 2016 ======================================================================= Huawei North America Headquarters Santa Clara, California August 24-26, 2016 ======================================================================= Hot Interconnects is the premier international forum for researchers and developers of state-of-the-art hardware and software architectures and implementations for interconnection networks of all scales, ranging from multi-core on-chip interconnects to those within systems, clusters, datacenters, and clouds. This yearly conference is attended by leaders in industry and academia. The atmosphere provides for a wealth of opportunities to interact with individuals at the forefront of this field. Themes include cross-cutting issues spanning computer systems, networking technologies, and communication protocols for high-performance interconnection networks. This conference is directed particularly at new and exciting technology and product innovations in these areas. Contributions should focus on real experimental systems, prototypes, or leading-edge products and their performance evaluation. Additional topics of interest are listed below. This year's best papers on interconnect microarchitecture will be invited to submit extended versions of their papers to a special edition of IEEE Micro. Building on last year's successful technical program, keynotes, sessions, and panels on datacenter networking, requirements, and solutions, in 2016 Hot Interconnects will be held at the Huawei North America Headquarters in Santa Clara, CA. This year's conference focuses on data-center, virtualized, and cloud networking. We hope you can join us there. SCHEDULE: * Paper abstract deadline: May 4, 2016 11:59PM AOE * Paper submission deadline: May 11, 2016 11:59PM AOE * Notification of acceptance: June 15, 2016 * Symposium: August 24-25, 2016 * Tutorials: August 26, 2016 AWARDS: An award will be given to the best student paper. To be eligible, at least one of the paper's authors must be a full-time student at the time of submission. In addition, HotI will provide student travel awards. Information on travel awards can be found on our web site. TOPICS OF INTEREST: * Novel and innovative interconnect architectures * Multi-core processor interconnects * System-on-Chip Interconnects * Advanced chip-to-chip communication technologies * Optical interconnects * Protocols and interfaces for inter-processor communication * Survivability and fault-tolerance of interconnects * High-speed packet processing engines and network processors * System and storage area network architectures and protocols * High-performance host-network interface architectures * High-bandwidth and low-latency I/O * Pb/s switching and routing technologies * Innovative architectures for supporting collective communication * Novel communication architectures to support cloud computing * Centralized and distributed cloud interconnects * Requirements driving high-performance interconnects * Traffic characterization for HPC systems and commercial datacenters * Software for Network/Fabric Bring-up, Configuration and Performance Management, e.g., OpenFlow or OpenSM * Data Center networking SUBMISSION GUIDELINES: We invite papers to be submitted either as regular, long papers (6-8 pages) or as short papers (3-4 pages). Short papers could be positional papers, industry papers, or papers describing hot-off-the-press breaking research results, and will judged accordingly and independently from the regular papers. * Accepted papers will be published in proceedings by the IEEE. * Papers must contain sufficient technical detail to judge quality and suitability for presentation. * Submissions should include title, author, abstract, and be formatted according to the two-column IEEE conference style guidelines. * Long paper limit: 8 pages, single-spaced, 2 columns. * Short paper limit: 4 pages, single-spaced, 2 columns. * Papers should be submitted electronically through EasyChair at https://www.easychair.org/conferences/?conf=hoti24 * Paper title and abstract must be submitted by the abstract deadline. * Full paper manuscript must be submitted by the paper deadline. * Presentations are 30 minutes in a single-track conference format. GENERAL CHAIRS: Ryan Grant, Sandia National Laboratories Charlie Perkins, Huawei TECHNICAL PROGRAM CHAIRS: James Dinan, Intel Ricki Williams, Oracle TECHNICAL PROGRAM COMMITTEE: Pavan Balaji, Argonne National Laboratory Ron Brightwell, Sandia National Laboratories Luca Carloni, Columbia University Monia Ghobadi, Microsoft Research Paolo Giaccone, Politecnico di Torino Brice Goglin, INRIA Mitch Gusat, IBM Zurich Khaled Hamidouche, The Ohio State University Dawei Huang, Oracle Ajay Joshi, Boston University Kirill Kogan, IMDEA Networks Institute Tushar Krishna, Georgia Tech Rami Melhem, University of Pittsburgh Cyriel Minkenberg, IBM Zurich Andrew Moore, University of Cambridge Mondrian Nuessle, University of Heidelberg Fabrizio Petrini, Intel Labs Mohammad Javad Rashti, RNET Technologies Galen Shipman, Los Alamos National Laboratory Craig Stunkel, IBM TJ Watson Keith Underwood, Intel Eitan Zahavi, Mellanox ======================================================================= Please contact us at info(a)hoti.org if you have any questions. Visit the Hot Interconnects web site for updates: www.hoti.org =======================================================================

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CFP of EMSICC'2016
by BOUZEFRANE Samia 09 Apr '16

09 Apr '16

Call for Papers --------------------- EMSICC 2016 – Third Edition of the International Workshop on Energy Management for Sustainable Internet-of-Things and Cloud Computing http://cedric.cnam.fr/workshops/emsicc16/ Deadline April 30, 2016 Vienna, Austria, 22-24 August 2016 In conjunction with IEEE FiCloud 2016, the 4nd IEEE International Conference on Future Internet of Things and Cloud http://ficloud.org/2016/ --------------------------------------------------------------------------- Scope of the Workshop: --------------------------------- With the emergence of new information, wireless communication and geolocation technologies, new innovative applications are designed moving towards the Internet of Things, Cyber-physical systems and Cloud computing, targeting virtualization technologies and intensive data computation. Due to their constraints in terms of energy, computational power, memory, high mobility, sporadic connectivity, and sometimes security constraints, some smart devices need to outsource their data storage and computation on the Cloud. Hence, the Internet of Things as well as Cyber-physical systems require an efficient energy management to save energy and optimize energy consumption through communication protocols, scheduling approaches, self-organization mechanisms, offloading techniques, security solutions, etc. that rely on energy-aware and energy-adaptive concepts. In addition, alternative energy sources available in our environment could be used to achieve perpetual functioning without replacing or refilling batteries, such as energy harvesting. On the other side, energy management is also a concern for cloud data centers that need to be managed efficiently regarding power consumption, air conditioning, energy saving, and environmental impact. This workshop will address the range of problems related to energy-aware and energy harvesting management when designing software and hardware platforms for the Internet of Things, Cyber Physical Systems and Cloud computing. Prospective authors are invited to submit original, previously unpublished work, reporting on novel and significant research contributions, on-going research projects, experimental results and recent developments related to, but not limited, the following topics: Energy-aware/energy harvesting Scheduling algorithms Middleware for energy-efficient computing Instrumentation and measurement of energy-efficient computing and networking Enhanced Performance and QoS in energy-efficient systems Resource management in large infrastructures (such as datacenters) and in power/energy constrained systems Data management in energy-efficient systems Sensing, monitoring, control, and management of energy systems Modelling, control, and architectures for renewable energy generation resources Privacy and security in energy-aware platforms Metrics, benchmarks, interfaces, tools to take into account Energy dimension Energy-aware hardware platforms Specifications and validation of energy-aware platforms Energy efficiency and virtualization in Cloud of things. --------------------------------------------------------------------------- Important dates: --------------------- Paper submission: April 30, 2016 Author notification: May 30, 2016 Final Manuscript Due: June 15, 2016 --------------------------------------------------------------------------- Submission procedure: -------------------------------- Authors are requested to electronically submit a PDF paper (maximum 6 pages in IEEE two-column format: http://www.computer.org/portal/web/cscps/formatting.) Use the following link for submission: https://easychair.org/conferences/?conf=emsicc2016. The proceedings of the workshop will be published by the IEEE CPS. For any question, send an email to emsicc2016(a)easychair.org. --------------------------------------------------------------------------- Organizing Committee ------------------------------- Samia Bouzefrane, INRIA/CNAM, France Maryline Chetto, University of Nantes, France Selma Boumerdassi, CNAM, France.

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ABSTRACT DEADLINE NEARING APRIL 20, 2016 - First Workshop on Performance Portable Programming Models for Accelerators (P^3MA) @ ISC 2016
by Sunita Chandrasekaran 09 Apr '16

09 Apr '16

Title: First International Workshop on Performance Portable Programming Models for Accelerators (P^3MA) http://www.csm.ornl.gov/workshops/p3ma2016/ <http://www.csm.ornl.gov/workshops/p3ma2016/committee.html> *June 23, 2016 * co-located with ISC 2016 <http://www.isc-hpc.com/home.html> June 19 - 23, Frankfurt, Germany *CALL FOR PAPERS* High-Level programming models offer scientific applications a path onto HPC platforms without an undue loss of portability or programmer productivity. For example, using directives, application developers can port their codes to accelerators incrementally while minimizing code changes. Other approaches include Domain Specific Languages, C++ metaprogramming, and runtimes APIs being developed for Exascale which are starting to emerge. Although these approaches aim to introduce abstraction without performance penalty, programming challenges are still manyfold especially with their designs, implementations and application porting experiences on rapidly evolving hardware, some with diverse memory subsystems. The programming approaches will need to adapt to such developments and make improvements to raise their performance portability that will increase the productivity of accelerators as HPC components. Such improvements are continuously being discussed with standards committees for C++, OpenCL, OpenMP, OpenACC, and Exascale co- design centers for DSLs. This workshop is designed to assess the improved features of programming models (including but not limited to directives-based programming models), their implementations, and experiences with their deployment in HPC applications on multiple architectures. The workshop will provide a forum for bringing together researchers, vendors, users and developers to brainstorm aspects of heterogeneous computing and its various tools and techniques. *Topics of interest (but are not limited to):* - Experience porting applications using high-level models - Hybrid heterogeneous or many-core programming with other models such as threading, message passing, and PGAS - Performance-portable scientific libraries for heterogeneous systems - Experiences in implementing compilers for programming directives on current and emerging architectures - Low level communications APIs or runtimes that support accelerator directives - Asynchronous task and event driven execution/scheduling - Extensions to programming models needed to support multiple memory hierarchies and accelerators - Performance modeling and evaluation tools - Power/energy studies - Auto-tuning or optimization strategies - Benchmarks and validation suites *Important Deadlines:* *Abstract Submission: April. 20, 2016 AoE* *Full Paper Submission: April 29th, 2016 AoE* Paper Notification: May. 27, 2016 Camera Ready Paper: June 03, 2016 *Program Agenda * 1 of the 2 keynote speakers: Dr. Si Hammond (Sandia National Lab, USA) https://cfwebprod.sandia.gov/cfdocs/CompResearch/templates/insert/profile.c… *Review process* Abstracts and papers need to be submitted via Easy Chair: https://easychair.org/conferences/?conf=p3ma We only accept paper submissions which are formatted correctly in LNCS style <http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0> (single column format) using either the LaTeX document class or Word template. Incorrectly formatted papers will be excluded from the reviewing process. Papers submissions are required to be within 18 pages in the above mentioned LNCS style. This includes all figures and references. The submissions are "single-blind", i.e. submissions are allowed to include the author names. All submitted manuscripts will be reviewed. The review process is not double blind, i.e., authors will be known to reviewers. Submissions will be judged on correctness, originality, technical strength, significance, quality of presentation, and interest and relevance to the conference scope. Submitted papers may NOT have appeared in or be under consideration for another conference, workshop or journal. *ORGANIZATION COMMITTEE* *Steering Committee* Matthias Muller, RWTH Aachen University, Germany Barbara Chapman, StonyBrook University, USA Oscar Hernandez, ORNL, USA Duncan Poole, OpenACC, USA Torsten Hoefler, ETH, Zurich Michael Wong, OpenMP, Canada Mitsuhisa Sato, University of Tsukuba, Japan *Program Chair(s)* Sunita Chandrasekaran, University of Delaware, USA <schandra(a)udel.edu> Graham Lopez, ORNL, USA <lopezmg(a)ornl.gov> *Program Committee * Samuel Thibault, INRIA, University of Bordeaux, France James Beyer, NVIDIA, USA Wei Ding, AMD, USA Saber Feki, King Abdullah University, Saudi Arabia Robert Henschel, Indiana University, USA Michael Klemm, Intel, USA Eric Stotzer, Texas Instruments, USA Amit Amritkar, University of Houston, USA Guido Juckeland, HZDR, Germany Will Sawyer, ETH, Zurich Sameer Shende, University of Oregon, USA Costas Bekas, IBM, Zurich Toni Collis, University of Edinburgh, Scotland Adrian Jackson, University of Edinburgh, Scotland Henri Jin, NASA, USA Andreas Knuepfer, TU Dresden, Germany Steven Olivier, Sandia National Laboratory, USA Suraj Prabhakaran, TU Darmstadt, Germany Bora Ucar, ENS De Lyon, France Sandra Wienke, Aachen University, Germany *Questions? Please contact one of the program chairs.*

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AlCoB 2016: call for posters
by GRLMC 09 Apr '16

09 Apr '16

AlCoB 2016: call for posters*To be removed from our mailing list, please respond to this message with UNSUBSCRIBE in the subject line* -------------------------------------------- The 3th International Conference on Algorithms for Computational Biology (AlCoB 2016) invites researchers to submit poster presentations. AlCoB 2016 will be held in Trujillo (Spain) on June 21-22, 2016. See http://grammars.grlmc.com/AlCoB2016/ Poster presentations are intended to enhance informal interactions with the conference participants, at the same time allowing for in-depth discussion. TOPICS Presentations displaying novel work in progress on algorithms in computational biology are encouraged on the following topics: - assembling sequence reads into a complete genome, - identifying gene structures in the genome, - recognizing regulatory motifs, - aligning nucleotides and comparing genomes, - reconstructing regulatory networks of genes, and - inferring the evolutionary phylogeny of species. Posters do not need to show final research results. Work that might lead to new interesting developments is welcome. KEY DATES Submission deadline: May 14, 2016 Notification of poster acceptance or rejection: May 21, 2016 SUBMISSION Please submit a .pdf abstract through: https://www.easychair.org/conferences/?conf=alcob2016 It should contain the title, author(s) and affiliation, and should not exceed 500 words. PRESENTATION Posters will be allocated 10 minutes each in the programme for oral presentation. Moreover, they will remain hanging out during the whole conference for discussion. PUBLICATION Posters will not appear in the LNCS/LNBI proceedings volume of AlCoB 2016. However, they will be eligible for submission to the post-conference journal special issue in IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB, 2014 JCR impact factor: 1.438, quartile Q1). REGISTRATION At least one author of each accepted poster must register to the conference. The registration fare is reduced: 240 Euro. However, it gives the same rights all other conference participants have (attendance, copy of the proceedings volume, lunches...). Contributors of regular papers who in addition get a poster accepted must register for the latter independently.

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CFP-SIGPLAN Workshop on Programming Heterogeneous Computing-with PLDI 2016
by 王超 08 Apr '16

08 Apr '16

Deadline extended to April 15, 2016! The 1st ACM SIGPLAN Workshop on Programming Heterogeneous Computing Systems To be held in Santa Barbara, California, USA, June 13, 2016, In conjunction with PLDI 2016 http://conf.researchr.org/track/pldi-2016/WPHCS-2016-papers Heterogeneous computing systems are emerging as one of the most common sense and challenging features of the cutting-edge parallel and high performance environments. The heterogeneity of computing tasks is boosting significantly from different levels of parallelism. However, traditional parallel programming models, memory hierarchies, algorithms, tools, designed for or homogeneous or symmetric multiprocessors, will be able to achieve limited performance improvement and productivity in next generation highly diverse heterogeneous computing systems. Novel ideas, innovative algorithms, and programming paradigms and specialized software tools should be considered to efficiently utilize the hardware resources on the new heterogeneous architectures (e.g., GPU, FPGA). The workshop is intended to be a forum for researchers to present and discuss innovative ideas and solutions in the design, modeling, prototyping, programming, and experience of heterogeneous architectures and Systems. Topics of interest include, but are not limited to: Programming paradigms and middleware for heterogeneous platforms (hybrid clusters, Grids or Clouds) Programming models for heterogeneous systems, including manycores and hardware accelerators (FPGAs, GPUs, etc.) Programming languages, libraries, runtime support and interfaces for diverse heterogeneous programming models (CUDA, OpenCL, etc.) Programming with memory hierarchies and novel explicit memory systems (NVRAM, STT-RAM,3D Memory, etc.) Software tooling (e.g., testing, debugging, tuning, and analysis tools) for programs on heterogeneous platforms. Applications and case studies on heterogeneous computing systems, such as neural networks, deep learning, neuromorphic engineering, scientific computing, and computational biology data-intensive applications. Fault tolerance of heterogeneous computations on heterogeneous platforms Authors are encouraged to submit original, unpublished research or overviews on programming models, algorithms and tools on heterogeneous platforms, namely addressing the topics referred above. Submitted manuscripts may not exceed a total of 6 pages in ACM SIGPLAN proceedings style, including figures, tables, and references. The results of the workshop will be made available on-line to participants before the workshop event. The posters and slides will be available on-line after the workshop event. Submissions will be with EasyChair. https://easychair.org/conferences/?conf=wphcs2016 Accepted and presented papers will be published in ACM Digital Library. For any questions about the workshop, send an email to wphcs16(a)gmail.com Important Dates: Paper submissions: April 15, 2016 (AOE) Notification of authors: April 27, 2016 (AOE) Workshop date: June 13, 2016 (AOE) Travel Fund: As the workshop is sponsored by the ACM SIGPLAN, the attendees are eligible for the PAC travel fund, please refer to http://www.sigplan.org/PAC/ for more details. Workshop Organizers: Yuan Xie, Professor, Department of Electrical and Computer Engineering, University of California at Santa Barbara Wen-mei Hwu, the Walter J. Sanders III-Advanced Micro Devices Endowed Chair, University of Illinois at Urbana-Champaign Chao Wang, School of Computer Science, University of Science and Technology of China Tao Xie, Associate Professor and Willett Faculty Scholar, Department of Computer Science, University of Illinois at Urbana-Champaign -- Best Regards Chao Wang Embedded System Lab, School of Computer Science University of Science and Technology of China http://staff.ustc.edu.cn/~cswang

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HeteroPar 2016: Call for Papers
by Loris Marchal 08 Apr '16

08 Apr '16

(Our apologies for duplicates) ============================================================================== CALL FOR PAPERS 14th International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms HeteroPar'2016 August 22 or 23, 2016, Grenoble, France in conjunction with EuroPar 2016 http://www.ens-lyon.fr/LIP/ROMA/HeteroPar2016 ============================================================================== * Submission of manuscripts: May 6, 2016 * Notification of acceptance: June 17, 2016 * Deadline for final version: October 3, 2016 * Date of workshop: Mon.-Tue., August 22 or 23, 2016 ------------------------------------------------------------------------------ Heterogeneity is emerging as one of the most profound and challenging characteristics of today's parallel environments. From the macro level, where networks of distributed computers composed by diverse node architectures are interconnected with potentially heterogeneous networks, to the micro level, where deeper memory hierarchies and various accelerator architectures are increasingly common, the impact of heterogeneity on all computing tasks is increasing rapidly. Traditional parallel algorithms, programming environments and tools, designed for legacy homogeneous multiprocessors, will at best achieve a small fraction of the efficiency and the potential performance that we should expect from parallel computing in tomorrow's highly diversified and mixed environments. New ideas, innovative algorithms, and specialized programming environments and tools are needed to efficiently use these new and multifarious parallel architectures. The workshop is intended to be a forum for researchers working on algorithms, programming languages, tools, and theoretical models aimed at efficiently solving problems on heterogeneous networks. The topics to be covered include but are not limited to: * Heterogeneous parallel programming paradigms and models * Languages, libraries, and interfaces for different heterogeneous parallel programming models * Performance models and their integration into the design of efficient parallel algorithms for heterogeneous platforms * Parallel algorithms for heterogeneous and/or hierarchical multi-core systems, including manycores and hardware accelerators (FPGAs, GPUs, Xeon Phi, etc.) * Parallel algorithms for efficient problem solving on heterogeneous platforms (numerical linear algebra, nonlinear systems, fast transforms, computational biology, data mining, multimedia, etc.) * Software engineering for heterogeneous parallel systems * Applications on heterogeneous platforms * Integration of parallel and distributed computing on heterogeneous platforms * Experience of porting parallel software from supercomputers to heterogeneous platforms * Fault tolerance of parallel computations on heterogeneous platforms * Algorithms, models and tools for grid, desktop grid, cloud, and green computing Authors are encouraged to submit original, unpublished research or overviews on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms. Manuscripts should be limited to 12 pages in Springer LNCS stylesheet and submitted through the EasyChair Conference System. Accepted papers that are presented at the workshop will be published in revised form in a special Euro-Par Workshop Volume in the Lecture Notes in Computer Science (LNCS) series after the Euro-Par conference. ------------------------------------------------------------------------------ Special issue in Elsevier's Parallel Computing journal: Authors of paper accepted for presentation at HeteroPar 2016 will be proposed to submit an extended version of their work to a Special Issue of Elsevier's Parallel Computing journal. This issue, by invitation only, is limited to authors of both the HeteroPar 2016 workshop and the HCW 2016 workshop. ------------------------------------------------------------------------------ Program Chair * Loris Marchal, CNRS, France ------------------------------------------------------------------------------ Steering Committee * Domingo Gimenez, University of Murcia, Spain * Alexey Kalinov, Cadence Design Systems, Russia * Alexey Lastovetsky, University College Dublin, Ireland * Yves Robert, Ecole Normale Superieure de Lyon, France * Leonel Sousa, INESC-ID/IST, TU Lisbon, Portugal * Denis Trystram, LIG, Grenoble, France ------------------------------------------------------------------------------ Program Committee * Rosa M. Badia, Barcelona Supercomputing Center, Spain * Jorge Barbosa, Faculdade de Engenharia do Porto, Portugal * Olivier Beaumont, INRIA Bordeaux Sud-Ouest, France * Cristina Boeres, Universidade Federal Fluminense, Brasil * Aur√©lien Bouteillier, University of Tennessee Knoxville, USA * Louis-Claude Canon, Universit√© de Franche-Comt√©, France * Edgar Gabriel, University of Houston, USA * Helen Karatza, Aristotle University of Thessaloniki, Greece * Shuichi Ichikawa, Toyohashi University of Technology, Japan * Emmanuel Jeannot, INRIA, France * Hatem Ltaief, KAUST, Saudi Arabia * Giorgio Lucarelli, LIG, University of Grenoble-Alpes, France * Pierre Manneback, University of Mons, Belgium * Satoshi Matsuoka, Tokyo Institute of Technology, Japan * Rafael Mayo Gual, University Jaume I, Spain * Masahiro Nakao, RIKEN Advanced Institute of Computational Science, Japan * Dana Petcu, West University of Timisoara, Romania * Enrique S. Quintana-Ort√≠, Universidad Jaume I, Spain * Thomas Rauber, University of Bayreuth, Germany * Matei Ripeanu, University of British Columbia, Canada * Erik Saule, University of North Carolina at Charlotte, USA * Thomas Scogland, Lawrence Livermore National Laboratory, USA * Antonio M. Vidal, Universidad Politecnica de Valencia, Spain * Frederic Vivien, INRIA, France * Jon Weissman, University of Minnesota, USA

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